System Performance: From Enterprise to AI
Kumar, A., Chang, L., Tellez, G.E., Clevenger, L.A., Burns, J.L.
Published in 2018 IEEE International Electron Devices Meeting (IEDM) (01.12.2018)
Published in 2018 IEEE International Electron Devices Meeting (IEDM) (01.12.2018)
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Conference Proceeding
Electromigration in AlCu lines: comparison of Dual Damascene and metal reactive ion etching
Filippi, R.G, Gribelyuk, M.A, Joseph, T, Kane, T, Sullivan, T.D, Clevenger, L.A, Costrini, G, Gambino, J, Iggulden, R.C, Kiewra, E.W, Ning, X.J, Ravikumar, R, Schnabel, R.F, Stojakovic, G, Weber, S.J, Gignac, L.M, Hu, C.-K, Rath, D.L, Rodbell, K.P
Published in Thin solid films (01.06.2001)
Published in Thin solid films (01.06.2001)
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Journal Article
Formation of a crystalline metal-rich silicide in thin film titanium/silicon reactions
Clevenger, L.A, Cabral, C, Roy, R.A, Lavoie, C, Jordan-Sweet, J, Brauer, S, Morales, G, Ludwig, K.F, Stephenson, G.B
Published in Thin solid films (01.01.1996)
Published in Thin solid films (01.01.1996)
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Journal Article
Crystallographic texture of C54 titanium disilicide as a function of deep submicron structure geometry
Svilan, V., Rodbell, K.P., Clevenger, L.A., Cabral, C., Roy, R.A., Lavoie, C., Jordan-Sweet, J., Harper, J. M. E.
Published in Journal of electronic materials (01.09.1997)
Published in Journal of electronic materials (01.09.1997)
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Journal Article
Temperature dependence of the Al-fill processes for submicron-via structures
Weber, S.J, Iggulden, R.C, Schnabel, R.F, Weigand, P, Restaino, D.D, Brodsky, S.B, Mehter, E.A, Clevenger, L.A
Published in Thin solid films (04.05.1998)
Published in Thin solid films (04.05.1998)
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Conference Proceeding
Aluminum dual damascene metallization for 0.175 μm DRAM generations and beyond ( invited)
Schnabel, R.F, Clevenger, L.A, Costrini, G, Dobuzinsky, D.M, Filippi, R, Gambino, J, Lee, G.Y, Iggulden, R.C, Lin, C, Lu, Z.G, Ning, X.J, Ramachandran, R, Ronay, M, Többen, D, Weber, S.J
Published in Microelectronic engineering (2000)
Published in Microelectronic engineering (2000)
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Conference Proceeding
A novel low temperature CVD/PVD Al filling process for producing highly reliable 0.175 /spl mu/m wiring/0.35 /spl mu/m pitch dual damascene interconnections in gigabit scale DRAMs
Clevenger, L.A., Costrini, G., Dobuzinsky, D.M., Filippi, R., Gambino, J., Hoinkis, M., Gignac, L., Hurd, J.L., Iggulden, R.C., Lin, C., Longo, R., Lu, G.Z., Ning, J., Nuetzel, J.F., Ploessl, R., Rodbell, K., Ronay, M., Schnabel, R.F., Tobben, D., Weber, S.J., Chen, L., Chiang, S., Gou, T., Mosely, R., Voss, S., Yang, L.
Published in Proceedings of the IEEE 1998 International Interconnect Technology Conference (Cat. No.98EX102) (1998)
Published in Proceedings of the IEEE 1998 International Interconnect Technology Conference (Cat. No.98EX102) (1998)
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