Clocked Hysteresis Control Scheme With Power-Law Frequency Scaling in Buck Converter to Improve Light-Load Efficiency for IoT Sensor Nodes
Wu, Chung-Shiang, Takamiya, Makoto, Sakurai, Takayasu
Published in IEEE transactions on very large scale integration (VLSI) systems (01.06.2018)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.06.2018)
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Journal Article
An all-digital power management unit with 90% power efficiency and ns-order voltage transition time for DVS operation in low power sensing SoC applications
Chung-Shiang Wu, Kai-Chun Lin, Yi-Ping Kuo, Po-Hung Chen, Yuan-Hua Chu, Wei Hwang
Published in 2015 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2015)
Published in 2015 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2015)
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Conference Proceeding
Buck converter with higher than 87% efficiency over 500nA to 20mA load current range for IoT sensor nodes by Clocked Hysteresis Control
Chung-Shiang Wu, Takamiya, Makoto, Sakurai, Takayasu
Published in 2017 IEEE Custom Integrated Circuits Conference (CICC) (01.04.2017)
Published in 2017 IEEE Custom Integrated Circuits Conference (CICC) (01.04.2017)
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Conference Proceeding
20.10 A 50nW-to-10mW output power tri-mode digital buck converter with self-tracking zero current detection for photovoltaic energy harvesting
Chen, Po-Hung, Wu, Chung-Shiang, Lin, Kai-Chun
Published in 2015 IEEE International Solid State Circuits Conference (ISSCC) (01.02.2015)
Published in 2015 IEEE International Solid State Circuits Conference (ISSCC) (01.02.2015)
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Conference Proceeding
Journal Article
A 48 V Input 0.75 V Output DC-DC Converter Power Block for HPC Systems and Datacenters (invited paper)
Takken, Todd, Ferencz, Andrew, Wu, Chung-Shiang, McAuliffe, Liam, Jia, Tianyu, Zhang, Xin
Published in 2019 Symposium on VLSI Circuits (01.06.2019)
Published in 2019 Symposium on VLSI Circuits (01.06.2019)
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Conference Proceeding
PVT-aware digital controlled voltage regulator design for ultra-low-power (ULP) DVFS systems
Wu, Pei-Chen, Kuo, Yi-Ping, Wu, Chung-Shiang, Chuang, Ching-Te, Chu, Yuan-Hua, Hwang, Wei
Published in 2014 27th IEEE International System-on-Chip Conference (SOCC) (01.09.2014)
Published in 2014 27th IEEE International System-on-Chip Conference (SOCC) (01.09.2014)
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Conference Proceeding
All digitally controlled linear voltage regulator with PMOS strength self-calibration for ripple reduction
Yi-Ping Kuo, Po-Tsang Huang, Chung-Shiang Wu, Yu-Jie Liang, Ching-Te Chuang, Yuan-Hua Chu, Wei Hwang
Published in VLSI Design, Automation and Test(VLSI-DAT) (01.04.2015)
Published in VLSI Design, Automation and Test(VLSI-DAT) (01.04.2015)
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Conference Proceeding