Scalable High-Performance Phase-Change Memory Employing CVD GeBiTe
LEE, Jinil, CHO, Sunglae, AHN, Dongho, KANG, Mansug, NAM, Seokwoo, KANG, Ho-Kyu, CHUNG, Chilhee
Published in IEEE electron device letters (01.08.2011)
Published in IEEE electron device letters (01.08.2011)
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Journal Article
Unified Endurance Degradation Model of Floating Gate NAND Flash Memory
Fayrushin, A., Chang-Hyun Lee, Youngwoo Park, Jeong-Hyuk Choi, Chilhee Chung
Published in IEEE transactions on electron devices (01.06.2013)
Published in IEEE transactions on electron devices (01.06.2013)
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Journal Article
A 1.5Mpixel RGBZ CMOS image sensor for simultaneous color and range image capture
Wonjoo Kim, Wang Yibing, Ovsiannikov, I., SeungHoon Lee, Yoondong Park, Chilhee Chung, Fossum, E.
Published in 2012 IEEE International Solid-State Circuits Conference (01.02.2012)
Published in 2012 IEEE International Solid-State Circuits Conference (01.02.2012)
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Conference Proceeding
Accurate Compact Modeling for Sub-20-nm nand Flash Cell Array Simulation Using the PSP Model
JEON, Jongwook, IL HAN PARK, KANG, Myounggon, HAHN, Wookghee, CHOI, Kihwan, YUN, Sunghee, YANG, Gi-Young, LEE, Keun-Ho, PARK, Young-Kwan, CHUNG, Chilhee
Published in IEEE transactions on electron devices (01.12.2012)
Published in IEEE transactions on electron devices (01.12.2012)
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Journal Article
Intrinsic fluctuations in Vertical NAND flash memories
Nowak, Etienne, Jae-Ho Kim, HyeYoung Kwon, Young-Gu Kim, Jae Sung Sim, Seung-Hyun Lim, Dae Sin Kim, Keun-Ho Lee, Young-Kwan Park, Jeong-Hyuk Choi, Chilhee Chung
Published in 2012 Symposium on VLSI Technology (VLSIT) (01.06.2012)
Published in 2012 Symposium on VLSI Technology (VLSIT) (01.06.2012)
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Conference Proceeding
Cost-Effective Silicon Vertical Diode Switch for Next-Generation Memory Devices
LEE, Kong-Soo, HAN, Jae-Jong, LIM, Hanjin, NAM, Seokwoo, CHUNG, Chilhee, JEONG, Hong-Sik, PARK, Hyunho, JEONG, Hanwook, CHOI, Byoungdeog
Published in IEEE electron device letters (01.02.2012)
Published in IEEE electron device letters (01.02.2012)
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Journal Article
Dynamic Vpass Controlled Program Scheme and Optimized Erase Vth Control for High Program Inhibition in MLC NAND Flash Memories
PARK, Ki-Tae, YOUNGSUN SONG, MYOUNGGON KANG, SUNGSOO LEE, LIM, Young-Ho, SUH, Kang-Deog, CHILHEE CHUNG
Published in IEEE journal of solid-state circuits (01.10.2010)
Published in IEEE journal of solid-state circuits (01.10.2010)
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Journal Article
Comprehensive modeling of NAND flash memory reliability: Endurance and data retention
Zhiliang Xia, Dae Sin Kim, Narae Jeong, Young-Gu Kim, Jae-Ho Kim, Keun-Ho Lee, Young-Kwan Park, Chilhee Chung, Hwan Lee, Jungin Han
Published in 2012 IEEE International Reliability Physics Symposium (IRPS) (01.04.2012)
Published in 2012 IEEE International Reliability Physics Symposium (IRPS) (01.04.2012)
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Conference Proceeding
New scaling limitation of the floating gate cell in NAND Flash Memory
Yong Seok Kim, Dong Jun Lee, Chi Kyoung Lee, Hyun Ki Choi, Seong Soo Kim, Jai Hyuk Song, Du Heon Song, Jeong-Hyuk Choi, Kang-Deog Suh, Chilhee Chung
Published in 2010 IEEE International Reliability Physics Symposium (01.01.2010)
Published in 2010 IEEE International Reliability Physics Symposium (01.01.2010)
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Conference Proceeding
Current status and future prospect of Phase Change Memory
Byeungchul Kim, Yoonjong Song, Sujin Ahn, Younseon Kang, Hoon Jeong, Dongho Ahn, Seokwoo Nam, Gitae Jeong, Chilhee Chung
Published in 2011 9th IEEE International Conference on ASIC (01.10.2011)
Published in 2011 9th IEEE International Conference on ASIC (01.10.2011)
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Conference Proceeding
Aggressively scaled high-k last metal gate stack with low variability for 20nm logic high performance and low power applications
Hyun, S., Han, J., Park, H., Na, H., Son, H. J., Lee, H. Y., Hong, H., Lee, H., Song, J., Kim, J. J., Lee, J., Jeong, W. C., Cho, H. J., Seo, K. I., Kim, D. W., Sim, S. P., Kang, S. B., Sohn, D. K., Siyoung Choi, Kang, H., Chilhee Chung
Published in 2011 Symposium on VLSI Technology - Digest of Technical Papers (01.06.2011)
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Published in 2011 Symposium on VLSI Technology - Digest of Technical Papers (01.06.2011)
Conference Proceeding
Microstructural Characterization in Reliability Measurement of Phase Change Random Access Memory
Bae, Junsoo, Hwang, Kyuman, Park, Kwangho, Jeon, Seongbu, Kang, Dae-hwan, Park, Soonoh, Ahn, Juhyeon, Kim, Seoksik, Jeong, Gitae, Chung, Chilhee
Published in Japanese Journal of Applied Physics (01.04.2011)
Published in Japanese Journal of Applied Physics (01.04.2011)
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Journal Article
Microstructural Characterization in Reliability Measurement of Phase Change Random Access Memory
Bae, Junsoo, Hwang, Kyuman, Park, Kwangho, Jeon, Seongbu, Kang, Dae-hwan, Park, Soonoh, Ahn, Juhyeon, Kim, Seoksik, Jeong, Gitae, Chung, Chilhee
Published in Japanese Journal of Applied Physics (01.04.2011)
Published in Japanese Journal of Applied Physics (01.04.2011)
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Journal Article
Highly reliable vertical NAND technology with biconcave shaped storage layer and leakage controllable offset structure
Won-seok Cho, Sun Il Shim, Jaehoon Jang, Hoo-sung Cho, Byoung-Koan You, Byoung-Keun Son, Ki-hyun Kim, Jae-Joo Shim, Choul-min Park, Jin-soo Lim, Kyoung-Hoon Kim, De-will Chung, Ju-Young Lim, Hui-Chang Moon, Sung-min Hwang, Hyun-seok Lim, Han-Soo Kim, Jungdal Choi, Chilhee Chung
Published in 2010 Symposium on VLSI Technology (01.06.2010)
Published in 2010 Symposium on VLSI Technology (01.06.2010)
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Conference Proceeding
Properties of isolation liner and electrical characteristics of high aspect ratio TSV in 3D stacking technology
DeokYoung Jung, Kwang-Jin Moon, Byung-Lyul Park, Gilheyun Choi, Ho-Kyu Kang, Chilhee Chung, Deok Young Jung, Yonghan Rho
Published in 2012 SEMI Advanced Semiconductor Manufacturing Conference (01.05.2012)
Published in 2012 SEMI Advanced Semiconductor Manufacturing Conference (01.05.2012)
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Conference Proceeding
Formation of highly reliable Cu/low-k interconnects by using CVD Co barrier in dual damascene structures
Hye Kyung Jung, Hyun-Bae Lee, Tsukasa, Matsuda, Jung, Eunji, Jong-Ho Yun, Jong Myeong Lee, Gil-Heyun Choi, Siyoung Choi, Chilhee Chung
Published in 2011 International Reliability Physics Symposium (01.04.2011)
Published in 2011 International Reliability Physics Symposium (01.04.2011)
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Conference Proceeding
Current-voltage characteristics of vertical diodes for next generation memories
Hokyun An, Kong-Soo Lee, Yoongoo Kang, Seonghoon Jeong, Wonseok Yoo, Jae-Jong Han, Bonghyun Kim, Hanjin Lim, Seokwoo Nam, Gi-Tae Jeong, Ho-Kyu Kang, Chilhee Chung, Byoungdeog Choi
Published in 2012 Proceedings of the European Solid-State Device Research Conference (ESSDERC) (01.09.2012)
Published in 2012 Proceedings of the European Solid-State Device Research Conference (ESSDERC) (01.09.2012)
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Conference Proceeding
Investigation of charge loss mechanisms in planar and raised STI charge trapping flash memories
Zhiliang Xia, Dae Sin Kim, Ju-Yul Lee, Keun-Ho Lee, Young-Kwan Park, Moon-Hyun Yoo, Chilhee Chung
Published in 2010 International Conference on Simulation of Semiconductor Processes and Devices (01.09.2010)
Published in 2010 International Conference on Simulation of Semiconductor Processes and Devices (01.09.2010)
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Conference Proceeding
A new floating gate cell structure with a silicon-nitride cap layer for sub-20 nm NAND flash memory
Kwang Soo Seol, Heesoo Kang, Jaeduk Lee, Hyunsuk Kim, Byungkyu Cho, Dohyun Lee, Yong-Lack Choi, Nok-Hyun Ju, Changmin Choi, SungHoi Hur, Jungdal Choi, Chilhee Chung
Published in 2010 Symposium on VLSI Technology (01.06.2010)
Published in 2010 Symposium on VLSI Technology (01.06.2010)
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Conference Proceeding
New phenomena for the Lifetime Prediction of TANOS-based Charge Trap NAND Flash Memory
Juhyung Kim, Changseok Kang, Sung-Il Chang, Jongyeon Kim, Younseok Jeong, Chan Park, Joo-Heon Kang, Sang-Hoon Kim, Sunkyu Hwang, Byeong-In Choe, Jintaek Park, Juhyuck Chung, Youngwoo Park, Jungdal Choi, Chilhee Chung
Published in 68th Device Research Conference (01.06.2010)
Published in 68th Device Research Conference (01.06.2010)
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Conference Proceeding