Formal methods for analyzing the completeness of an assertion suite against a high-level fault model
Sayanlan Das, Ansuman Banerjee, Prasenjit Basu, Pallab Dasgupta, Chakrabarti, P.P., Chunduri Rama Mohan, Fix, L.
Published in 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (2005)
Published in 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (2005)
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Conference Proceeding
Formal Methods for Coverage Analysis of Power Management Logic with Mixed-Signal Components
Mandal, Sudipa, Hazra, Aritra, Dasgupta, Pallab, Chunduri, Rama Mohan
Published in 2018 31st International Conference on VLSI Design and 2018 17th International Conference on Embedded Systems (VLSID) (01.01.2018)
Published in 2018 31st International Conference on VLSI Design and 2018 17th International Conference on Embedded Systems (VLSID) (01.01.2018)
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Conference Proceeding
Formal Verification of Power Management Logic with Mixed-Signal Domains
Mandal, Sudipa, Da Costa, Antonio Bruto, Hazra, Aritra, Dasgupta, Pallab, Naware, Bhushan, Chunduri, Rama Mohan, Basu, Sanjib
Published in 2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems (VLSID) (01.01.2017)
Published in 2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems (VLSID) (01.01.2017)
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Conference Proceeding
Formal verification coverage: computing the coverage gap between temporal specifications
Das, A., Basu, P., Banerjee, A., Dasgupta, P., Chakrabarti, P. P., Rama Mohan, C., Fix, L., Armoni, R.
Published in IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004 (07.11.2004)
Published in IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004 (07.11.2004)
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Conference Proceeding
Design-Intent Coverage-A New Paradigm for Formal Property Verification
Basu, P., Das, S., Banerjee, A., Dasgupta, P., Chakrabarti, P.P., Mohan, C.R., Fix, L., Armoni, R.
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.10.2006)
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.10.2006)
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Journal Article
Formal verification coverage: are the RTL-properties covering the design's architectural intent?
Basu, P., Das, S., Dasgupta, P., Chakrabarti, P.P., Mohan, C.R., Fix, L.
Published in Proceedings Design, Automation and Test in Europe Conference and Exhibition (2004)
Published in Proceedings Design, Automation and Test in Europe Conference and Exhibition (2004)
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Conference Proceeding
Cohesive Coverage Management for Simulation and Formal Property Verification
Hazra, A., Banerjee, A., Mitra, S., Dasgupta, P., Chakrabarti, P.P., Mohan, C.R.
Published in 2008 IEEE Computer Society Annual Symposium on VLSI (01.04.2008)
Published in 2008 IEEE Computer Society Annual Symposium on VLSI (01.04.2008)
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Conference Proceeding
Formal Verification Coverage: Are the RTL-Properties Covering the Design's Architectural Intent?
Basu, Prasenjit, Das, Sayantan, Dasgupta, Pallab, Chakrabarti, P. P., Mohan, Chunduri Rama, Fix, Limor
Published in Proceedings of the conference on Design, automation and test in Europe - Volume 1 (16.02.2004)
Published in Proceedings of the conference on Design, automation and test in Europe - Volume 1 (16.02.2004)
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Conference Proceeding