Search Results - "Chuang, Chih-Lun" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

A 7nm 0.46pJ/bit 20Gbps with BER 1E-25 Die-to-Die Link Using Minimum Intrinsic Auto Alignment and Noise-Immunity Encode

A 7nm 0.46pJ/bit 20Gbps with BER 1E-25 Die-to-Die Link Using Minimum Intrinsic Auto Alignment and Noise-Immunity Encode

by Hsu, Ying-Yu, Kuo, Po-Chun, Chuang, Chih-Lun, Chang, Po-Hao, Shen, Hung-Hao, Chiang, Chen-Feng
Published in 2021 Symposium on VLSI Circuits (13.06.2021)

Get full text

Conference Proceeding

Signal and Power Integrity Analysis of InFO Interconnect for Networking Application

Signal and Power Integrity Analysis of InFO Interconnect for Networking Application

by Po-Hao Chang, Chia-Yuan Hsieh, Chun-Wei Chang, Chih-Lun Chuang, Chen-Feng Chiang
Published in 2018 IEEE 68th Electronic Components and Technology Conference (ECTC) (01.05.2018)

Get full text

Conference Proceeding

A 7nm 0.46pJ/bit 20Gbps with BER 1E-25 Die-to-Die Link Using Minimum Intrinsic Auto Alignment and Noise-Immunity Encode

A 7nm 0.46pJ/bit 20Gbps with BER 1E-25 Die-to-Die Link Using Minimum Intrinsic Auto Alignment and Noise-Immunity Encode

by Hsu, Ying-Yu, Kuo, Po-Chun, Chuang, Chih-Lun, Chang, Po-Hao, Shen, Hung-Hao, Chiang, Chen-Feng
Published in 2021 Symposium on VLSI Technology (13.06.2021)

Get full text

Conference Proceeding

DECISION-FEEDBACK EQUALIZER USING FEEDBACK FILTER WITH CONTROLLABLE DELAY CIRCUIT AND ASSOCIATED METHOD

DECISION-FEEDBACK EQUALIZER USING FEEDBACK FILTER WITH CONTROLLABLE DELAY CIRCUIT AND ASSOCIATED METHOD

by HSIEH, Wen-Hsuan, CHUANG, Chih-Lun
Year of Publication 04.10.2023

Get full text

Patent

DECISION-FEEDBACK EQUALIZER USING FEEDBACK FILTER WITH CONTROLLABLE DELAY CIRCUIT AND ASSOCIATED METHOD

DECISION-FEEDBACK EQUALIZER USING FEEDBACK FILTER WITH CONTROLLABLE DELAY CIRCUIT AND ASSOCIATED METHOD

by Hsieh, Wen-Hsuan, Chuang, Chih-Lun
Year of Publication 28.09.2023

Get full text

Patent

Delay signal generating apparatus using glitch free digitally controlled delay line and associated delay signal generating method

Delay signal generating apparatus using glitch free digitally controlled delay line and associated delay signal generating method

by Chuang, Chih-Lun, Hsu, Ying-Yu
Year of Publication 18.12.2018

Get full text

Patent

Decision-feedback equalizer and method thereof

Decision-feedback equalizer and method thereof

by CHUANG, CHIH-LUN, HSIEH, WEN-HSUAN
Year of Publication 01.10.2023

Get full text

Patent

DELAY SIGNAL GENERATING APPARATUS USING GLITCH FREE DIGITALLY CONTROLLED DELAY LINE AND ASSOCIATED DELAY SIGNAL GENERATING METHOD

DELAY SIGNAL GENERATING APPARATUS USING GLITCH FREE DIGITALLY CONTROLLED DELAY LINE AND ASSOCIATED DELAY SIGNAL GENERATING METHOD

by Chuang, Chih-Lun, Hsu, Ying-Yu
Year of Publication 12.07.2018

Get full text

Patent

Transceiver and clock generation module

Transceiver and clock generation module

by Chuang, Chih-Lun, Hsu, Ying-Yu, Kuo, Po-Chun
Year of Publication 15.10.2019

Get full text

Patent

TRANSCEIVER AND CLOCK GENERATION MODULE

TRANSCEIVER AND CLOCK GENERATION MODULE

by HSU, Ying-Yu, KUO, Po-Chun, CHUANG, Chih-Lun
Year of Publication 18.07.2019

Get full text

Patent

Transceiver and clock generation module

Transceiver and clock generation module

by CHUANG, CHIH-LUN, KUO, POUN, HSU, YING-YU
Year of Publication 21.04.2020

Get full text

Patent

Prism sheet

Prism sheet

by CHUANG CHIH-LUN
Year of Publication 19.06.2007

Get full text

Patent

Prism sheet

Prism sheet

by Chuang, Chih-Lun
Year of Publication 19.06.2007

Get full text

Patent

Prism sheet

Prism sheet

by CHUANG CHIH-LUN
Year of Publication 16.11.2006

Get full text

Patent

Transceiver and clock generation module

Transceiver and clock generation module

by CHUANG, CHIH-LUN, KUO, POUN, HSU, YING-YU
Year of Publication 16.08.2019

Get full text

Patent

TRANSCEIVER AND CLOCK GENERATION MODULE

TRANSCEIVER AND CLOCK GENERATION MODULE

by HSU YING-YU, KUO POUN, CHUANG CHIH-LUN
Year of Publication 26.07.2019

Get full text

Patent

Delay signal generating apparatus and delay signal generating method

Delay signal generating apparatus and delay signal generating method

by CHUANG, CHIH-LUN, HSU, YING-YU
Year of Publication 11.05.2019

Get full text

Patent

DELAY SIGNAL GENERATING APPARATUS AND DELAY SIGNAL GENERATING METHOD

DELAY SIGNAL GENERATING APPARATUS AND DELAY SIGNAL GENERATING METHOD

by YING-YU HSU, CHIH-LUN CHUANG
Year of Publication 20.07.2018

Get full text

Patent

Delay signal generating apparatus and delay signal generating method

Delay signal generating apparatus and delay signal generating method

by CHUANG, CHIH-LUN, HSU, YING-YU
Year of Publication 16.07.2018

Get full text

Patent