A 4.5 Gb/s/pin transceiver with hybrid inter‐symbol interference and far‐end crosstalk equalization for next‐generation high‐bandwidth memory interface
Yoon, Kungryun, Park, Hyunsu, Choi, Yoonjae, Sim, Jincheol, Choi, Jonghyuck, Kim, Chulwoo
Published in Electronics letters (01.05.2022)
Published in Electronics letters (01.05.2022)
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Journal Article
Is antiplatelet treatment effective at attenuating the progression of white matter hyperintensities?
Yoon, Cindy W, Choi, Yoonjae, Jeon, Seun, Lee, Dae Hyung, Yoon, Byung-Nam, Park, Hee-Kwon, Rha, Joung-Ho
Published in PloS one (20.04.2017)
Published in PloS one (20.04.2017)
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Journal Article
30-Gb/s 1.11-pJ/bit Single-Ended PAM-3 Transceiver for High-Speed Memory Links
Park, Hyunsu, Song, Junyoung, Sim, Jincheol, Choi, Yoonjae, Choi, Jonghyuck, Yoo, Jeongsik, Kim, Chulwoo
Published in IEEE journal of solid-state circuits (01.02.2021)
Published in IEEE journal of solid-state circuits (01.02.2021)
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Journal Article
A Single-Ended NRZ Receiver With Gain-Enhanced Active-Inductive CTLE and Reference-Selection DFE for Memory Interfaces
Choi, Jonghyuck, Choi, Yoonjae, Sim, Jincheol, Kwon, Youngwook, Park, Seungwoo, Kim, Seongcheol, Sim, Changmin, Kim, Chulwoo
Published in IEEE journal of solid-state circuits (01.04.2024)
Published in IEEE journal of solid-state circuits (01.04.2024)
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Journal Article
A 56-Gb/s PAM-4 Receiver Using Time-Based LSB Decoder and S/H Technique for Robustness to Comparator Voltage Variations
Park, Hyunsu, Sim, Jincheol, Choi, Yoonjae, Choi, Jonghyuck, Kwon, Youngwook, Kim, Chulwoo
Published in IEEE journal of solid-state circuits (01.02.2022)
Published in IEEE journal of solid-state circuits (01.02.2022)
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Journal Article
Single-Ended PAM-4 Transmitters With Data Bus Inversion and ZQ Calibration for High-Speed Memory Interfaces
Kim, Seongcheol, Sim, Jincheol, Choi, Yoonjae, Choi, Jonghyuck, Kwon, Youngwook, Park, Seungwoo, Sim, Changmin, So, Junseob, Park, Taehyeong, Kim, Chulwoo
Published in IEEE journal of solid-state circuits (29.05.2024)
Published in IEEE journal of solid-state circuits (29.05.2024)
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Journal Article
A 0.45 pJ/b 24 Gb/s NRZ Receiver Data-Path Using Half-Baud-Rate Duobinary Sampling
Park, Seungwoo, Choi, Yoonjae, Choi, Jonghyuck, Sim, Jincheol, Kwon, Youngwook, Sim, Changmin, Kim, Seongcheol, Kim, Chulwoo
Published in IEEE transactions on circuits and systems. II, Express briefs (01.09.2024)
Published in IEEE transactions on circuits and systems. II, Express briefs (01.09.2024)
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Journal Article
A 4-GHz Ring-Oscillator-Based Digital Sub-Sampling PLL With Energy-Efficient Dual-Domain Phase Detector
Choi, Yoonjae, Park, Hyunsu, Choi, Jonghyuck, Sim, Jincheol, Kwon, Youngwook, Park, Seungwoo, Sim, Changmin, Kim, Chulwoo
Published in IEEE transactions on circuits and systems. I, Regular papers (01.07.2023)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.07.2023)
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Journal Article
A 25-Gb/s Single-Ended PAM-4 Receiver With Time-Windowed LSB Decoder for High-Speed Memory Interfaces
Choi, Yoonjae, Park, Hyunsu, Choi, Jonghyuck, Sim, Jincheol, Kwon, Youngwook, Park, Seungwoo, Kim, Seongcheol, Sim, Changmin, Kim, Chulwoo
Published in IEEE journal of solid-state circuits (01.07.2023)
Published in IEEE journal of solid-state circuits (01.07.2023)
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Journal Article
PAM-4 Receiver With 1-Tap DFE Using Clocked Comparator Offset Instead of Threshold Voltages for Improved LSB BER Performance
Sim, Jincheol, Park, Hyunsu, Choi, Yoonjae, Choi, Jonghyuck, Kwon, Youngwook, Kim, Chulwoo
Published in IEEE transactions on circuits and systems. I, Regular papers (01.05.2023)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.05.2023)
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Journal Article
Analysis of a Multiwire, Multilevel, and Symbol Correlation Combination Scheme
Choi, Jonghyuck, Choi, Yoonjae, Park, Hyunsu, Sim, Jincheol, Kwon, Youngwook, Park, Seungwoo, Kim, Chulwoo
Published in IEEE transactions on circuits and systems. I, Regular papers (01.08.2022)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.08.2022)
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Journal Article
A 15-Gb/s Single-Ended NRZ Receiver Using Self-Referenced Technique With 1-Tap Latched DFE for DRAM Interfaces
Kim, Seongcheol, Sim, Jincheol, Park, Hyunsu, Choi, Yoonjae, Choi, Jonghyuck, Kim, Chulwoo
Published in IEEE transactions on circuits and systems. II, Express briefs (01.01.2023)
Published in IEEE transactions on circuits and systems. II, Express briefs (01.01.2023)
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Journal Article
A 25-Gb/s Single-Ended PAM-4 Transmitter With iPWM-Based FFE and RLM-Matched Voltage-Mode Driver for High-Speed Memory Interfaces
Choi, Yoonjae, Sim, Changmin, Choi, Jonghyuck, Sim, Jincheol, Park, Hyunsu, Kwon, Youngwook, Park, Seungwoo, Kim, Seongcheol, Kim, Chulwoo
Published in IEEE transactions on circuits and systems. I, Regular papers (26.06.2024)
Published in IEEE transactions on circuits and systems. I, Regular papers (26.06.2024)
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Journal Article
A 16-Gb/s NRZ Receiver With 0.0019-pJ/bit/dB 1-Tap Charge-Redistribution DFE
Choi, Jonghyuck, Choi, Yoonjae, Park, Hyunsu, Sim, Jincheol, Kwon, Youngwook, Park, Seungwoo, Kim, Seongcheol, Kim, Chulwoo
Published in IEEE transactions on circuits and systems. II, Express briefs (01.03.2023)
Published in IEEE transactions on circuits and systems. II, Express briefs (01.03.2023)
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Journal Article
A 2.4-8 GHz Phase Rotator Delay-Locked Loop Using Cascading Structure for Direct Input-Output Phase Detection
Park, Hyunsu, Sim, Jincheol, Choi, Yoonjae, Choi, Jonghyuck, Kwon, Youngwook, Kim, Chulwoo
Published in IEEE transactions on circuits and systems. II, Express briefs (01.03.2022)
Published in IEEE transactions on circuits and systems. II, Express briefs (01.03.2022)
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Journal Article