A dual-gate-controlled single-electron transistor using self-aligned polysilicon sidewall spacer gates on silicon-on-insulator nanowire
HU, Shu-Fen, WU, Yung-Chun, SUNG, Chin-Lung, CHANG, Chun-Yen, HUANG, Tiao-Yuan
Published in IEEE transactions on nanotechnology (01.03.2004)
Published in IEEE transactions on nanotechnology (01.03.2004)
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