Characterization and Modeling of Flicker Noise in FinFETs at Advanced Technology Node
Kushwaha, Pragya, Agarwal, Harshit, Lin, Yen-Kai, Dasgupta, Avirup, Kao, Ming-Yen, Lu, Ye, Yue, Yun, Chen, Xiaonan, Wang, Joseph, Sy, Wing, Yang, Frank, Chidambaram, PR. Chidi, Salahuddin, Sayeef, Hu, Chenming
Published in IEEE electron device letters (01.06.2019)
Published in IEEE electron device letters (01.06.2019)
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Silicon Process Impact on 5G NR mmWave Front End Design and Performance
Cheng, Chuan-Cheng, Dunworth, Jeremy, Kalpat, Sriram, Cheng, Haitao, Liu, Gang, Yang, Ming-Ta, Sy, Wing, Wang, Joseph, Sahota, Kamal, Chidambaram, PR. Chidi
Published in 2019 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) (01.04.2019)
Published in 2019 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) (01.04.2019)
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Conference Proceeding
STANDARD CELL ARCHITECTURE USING DOUBLE POLY PATTERNING FOR MULTI VT DEVICES
VANG FOUA, CHIDAMBARAM PR, KAMAL PRATYUSH, PATEL PRAYAG B, SWAMYNATHAN CHETHAN, GAN CHOCK H
Year of Publication 17.10.2013
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Year of Publication 17.10.2013
Patent
Pattern Based Prediction for Plasma Etch
Abrokwah, K.O., Chidambaram, P.R., Boning, D.S.
Published in IEEE transactions on semiconductor manufacturing (01.05.2007)
Published in IEEE transactions on semiconductor manufacturing (01.05.2007)
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Environment dependence of analog matching and design-process optimization on a 28LP SoC technology for smart mobile devices
Cai, M., Sengupta, S., Choi, J., Qi, W., Wang, H., Huang, V., Alladi, D., Yuan, D., Chidambaram, Pr, Yeap, G.
Published in 25th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC 2014) (01.05.2014)
Published in 25th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC 2014) (01.05.2014)
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Conference Proceeding
Cost and power/performance optimized 20nm SoC technology for advanced mobile devices
Nallapati, G., Zhu, J., Wang, J., Sheu, J. Y., Cheng, K. L., Gan, C., Yang, D., Cai, M., Cheng, J., Ge, L., Chen, Y., Bucki, R., Bowers, B., Vang, F., Chen, X., Kwon, O., Yoon, S., Wu, C. C., Chidambaram, Pr, Cao, M., Fischer, J., Terzioglu, E., Mii, Y. J., Yeap, G.
Published in 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers (01.06.2014)
Published in 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers (01.06.2014)
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Conference Proceeding
RF and mixed-signal performances of a low cost 28nm low-power CMOS technology for wireless system-on-chip applications
Ming-Ta Yang, Ken Liao, Welstand, R., Teng, Charles, Wing Sy, Ying Chen, Dutta, R., Chidambaram, P., Han, Michael, Yang Du, Yeap, G.
Published in 2011 Symposium on VLSI Technology - Digest of Technical Papers (01.06.2011)
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Published in 2011 Symposium on VLSI Technology - Digest of Technical Papers (01.06.2011)
Conference Proceeding
35% drive current improvement from recessed-SiGe drain extensions on 37 nm gate length PMOS
Chidambaram, P.R., Smith, B.A., Hall, L.H., Bu, H., Chakravarthi, S., Kim, Y., Samoilov, A.V., Kim, A.T., Jones, P.J., Irwin, R.B., Kim, M.J., Rotondaro, A.L.P., Machala, C.F., Grider, D.T.
Published in Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004 (2004)
Published in Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004 (2004)
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Conference Proceeding
Gate length dependent polysilicon depletion effects
Chang-Hoon Choi, Chidambaram, P.R., Khamankar, R., Machala, C.F., Zhiping Yu, Dutton, R.W.
Published in IEEE electron device letters (01.04.2002)
Published in IEEE electron device letters (01.04.2002)
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High Performance 5G mobile SoC Design-Technology Co-Optimization for PPA and Manufacturability with 5nm EUV FinFET technology
Suh, Youseok, Bao, Jerry, Lin, Vicki, Kuo, Wade, Kim, Leo, Chen, Ying, Wang, Hao, Gao, Yandong, Cheng, Jason, Wang, Xiao-Yong, Park, Hyuk, Lim, Hochul, Kim, Sungwon, Shin, Hun, Song, Byungmoo, Masuoka, Yuri Y., Kim, Taegyun, Ku, Ja-Hum, Nallapati, Giri, Yang, Sam, Chidambaram, Pr
Published in 2022 International Electron Devices Meeting (IEDM) (03.12.2022)
Published in 2022 International Electron Devices Meeting (IEDM) (03.12.2022)
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Conference Proceeding
Dopant profile and gate geometric effects on polysilicon gate depletion in scaled MOS
Chang-Hoon Choi, Chidambaram, P.R., Khamankar, R., Machala, C.F., Zhiping Yu, Dutton, R.W.
Published in IEEE transactions on electron devices (01.07.2002)
Published in IEEE transactions on electron devices (01.07.2002)
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