A small area DLL-based clock generator using duty cycle controllable cyclic VCDL
Chuang, Chi-Nan, Wu, Chun-Yen
Published in International journal of electronics letters (01.10.2020)
Published in International journal of electronics letters (01.10.2020)
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Journal Article
A 0.5-5-GHz Wide-Range Multiphase DLL With a Calibrated Charge Pump
Chuang, Chi-Nan, Liu, Shen-Iuan
Published in IEEE transactions on circuits and systems. II, Express briefs (01.11.2007)
Published in IEEE transactions on circuits and systems. II, Express briefs (01.11.2007)
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Journal Article
A 20-MHz to 3-GHz Wide-Range Multiphase Delay-Locked Loop
Chuang, Chi-Nan, Liu, Shen-Iuan
Published in IEEE transactions on circuits and systems. II, Express briefs (01.11.2009)
Published in IEEE transactions on circuits and systems. II, Express briefs (01.11.2009)
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Journal Article
A 3-8 GHz Delay-Locked Loop With Cycle Jitter Calibration
Chuang, Chi-Nan, Liu, Shen-Iuan
Published in IEEE transactions on circuits and systems. II, Express briefs (01.11.2008)
Published in IEEE transactions on circuits and systems. II, Express briefs (01.11.2008)
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Journal Article
A Time-Constant Calibrated Phase-Locked Loop With a Fast-Locked Time
Han, Sung-Rung, Chuang, Chi-Nan, Liu, Shen-Iuan
Published in IEEE transactions on circuits and systems. II, Express briefs (01.01.2007)
Published in IEEE transactions on circuits and systems. II, Express briefs (01.01.2007)
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Journal Article
A 40GHz DLL-Based Clock Generator in 90nm CMOS Technology
Chuang, Chi-Nan, Liu, Shen-Iuan
Published in 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (01.02.2007)
Published in 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (01.02.2007)
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Conference Proceeding
A high-resolution multi-phase delay-locked loop with offset locking technique
Chuang, Chi-Nan, Wu, Chun-Yen, Lin, Tsui-Wei
Published in International journal of electronics (02.10.2016)
Published in International journal of electronics (02.10.2016)
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Journal Article
A 15-20GHz delay-locked loop in 90nm CMOS technology
Jung-Yu Chang, Chi-Nan Chuang, Shen-Iuan Liu
Published in 2008 IEEE Asian Solid-State Circuits Conference (01.11.2008)
Published in 2008 IEEE Asian Solid-State Circuits Conference (01.11.2008)
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Conference Proceeding
A wide-range and fast-locking frequency synthesizer for Wimax and WLAN applications
Chun-Yen Wu, Chao-Chyun Chen, Chi-Nan Chuang, I-Chyn Wey
Published in 2014 IEEE 3rd Global Conference on Consumer Electronics (GCCE) (01.10.2014)
Published in 2014 IEEE 3rd Global Conference on Consumer Electronics (GCCE) (01.10.2014)
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Conference Proceeding
Backstepping Adaptive Iterative Learning Control for Robotic Systems
Chien, Chiang Ju, Chuang, Chi Nan, Wang, Ying Chung
Published in Applied Mechanics and Materials (25.01.2013)
Published in Applied Mechanics and Materials (25.01.2013)
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Journal Article
A 3a8 GHz Delay-Locked Loop With Cycle Jitter Calibration
Chuang, Chi-Nan, Liu, Shen-Iuan
Published in IEEE transactions on circuits and systems. II, Express briefs (01.01.2008)
Published in IEEE transactions on circuits and systems. II, Express briefs (01.01.2008)
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Journal Article