On the Correct Extraction of Interface Trap Density of MOS Devices With High-Mobility Semiconductor Substrates
Martens, K., Chi On Chui, Brammertz, G., De Jaeger, B., Kuzum, D., Meuris, M., Heyns, M., Krishnamohan, T., Saraswat, K., Maes, H.E., Groeseneken, G.
Published in IEEE transactions on electron devices (01.02.2008)
Published in IEEE transactions on electron devices (01.02.2008)
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Journal Article
Nanoscale germanium MOS Dielectrics-part I: germanium oxynitrides
Chi On Chui, Ito, F., Saraswat, K.C.
Published in IEEE transactions on electron devices (01.07.2006)
Published in IEEE transactions on electron devices (01.07.2006)
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Journal Article
On the origin of enhanced sensitivity in nanoscale FET-based biosensors
Shoorideh, Kaveh, Chui, Chi On
Published in Proceedings of the National Academy of Sciences - PNAS (08.04.2014)
Published in Proceedings of the National Academy of Sciences - PNAS (08.04.2014)
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Journal Article
Device- and Circuit-Level Variability Caused by Line Edge Roughness for Sub-32-nm FinFET Technologies
Leung, G., Liangzhen Lai, Gupta, P., Chi On Chui
Published in IEEE transactions on electron devices (01.08.2012)
Published in IEEE transactions on electron devices (01.08.2012)
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Journal Article
Effective dark current suppression with asymmetric MSM photodetectors in Group IV semiconductors
Chi On Chui, Okyay, A.K., Saraswat, K.C.
Published in IEEE photonics technology letters (01.11.2003)
Published in IEEE photonics technology letters (01.11.2003)
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Journal Article
Fabrication of high-quality p-MOSFET in Ge grown heteroepitaxially on Si
Nayfeh, A., Chi On Chui, Yonehara, T., Saraswat, K.C.
Published in IEEE electron device letters (01.05.2005)
Published in IEEE electron device letters (01.05.2005)
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Journal Article
Electrostatic Modeling and Insights Regarding Multigate Lateral Tunneling Transistors
Pan, Andrew, Songtao Chen, Chi On Chui
Published in IEEE transactions on electron devices (01.09.2013)
Published in IEEE transactions on electron devices (01.09.2013)
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Journal Article
Tunneling Negative Differential Resistance-Assisted STT-RAM for Efficient Read and Write Operations
Shaodi Wang, Pan, Andrew, Chi On Chui, Gupta, Puneet
Published in IEEE transactions on electron devices (01.01.2017)
Published in IEEE transactions on electron devices (01.01.2017)
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Journal Article
Nanoscale germanium MOS Dielectrics-part II: high-/spl kappa/ gate dielectrics
Chi On Chui, Kim, H., Chi, D., McIntyre, P.C., Saraswat, K.C.
Published in IEEE transactions on electron devices (01.07.2006)
Published in IEEE transactions on electron devices (01.07.2006)
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Journal Article