Application of high-level decision diagrams for simulation-based verification tasks
Jenihhin, Maksim, Raik, Jaan, Chepurov, Anton, Ubar, Raimund
Published in Estonian journal of engineering (01.03.2010)
Published in Estonian journal of engineering (01.03.2010)
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Journal Article
Automated design error debug using high-level decision diagrams and mutation operators
Raik, Jaan, Repinski, Urmas, Chepurov, Anton, Hantson, Hanno, Ubar, Raimund, Jenihhin, Maksim
Published in Microprocessors and microsystems (01.06.2013)
Published in Microprocessors and microsystems (01.06.2013)
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Journal Article
PSL Assertion Checking Using Temporally Extended High-Level Decision Diagrams
Jenihhin, Maksim, Raik, Jaan, Chepurov, Anton, Ubar, Raimund
Published in Journal of electronic testing (01.12.2009)
Published in Journal of electronic testing (01.12.2009)
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Journal Article
Application of high-level decision diagrams for simulation-based verification tasks/Korgtaseme otsustusdiagrammide kasutamine simuleerimisel pohinevas riistvara verifitseerimisel
Jenihhin, Maksim, Raik, Jaan, Chepurov, Anton, Ubar, Raimund
Published in Estonian journal of engineering (01.03.2010)
Published in Estonian journal of engineering (01.03.2010)
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Journal Article
Mutation analysis with high-level decision diagrams
Hantson, Hanno, Raik, Jaan, Jenihhin, Maksim, Chepurov, Anton, Ubar, Raimund, di Guglielmo, Giuseppe, Fummi, Franco
Published in 2010 11th Latin American Test Workshop (01.03.2010)
Published in 2010 11th Latin American Test Workshop (01.03.2010)
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Conference Proceeding
High-level design error diagnosis using backtrace on decision diagrams
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Conference Proceeding
Temporally Extended High-Level Decision Diagrams for PSL Assertions Simulation
Jenihhin, M., Raik, J., Chepurov, A., Ubar, R.
Published in 2008 13th European Test Symposium (01.05.2008)
Published in 2008 13th European Test Symposium (01.05.2008)
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Conference Proceeding
High-Level Decision Diagrams based coverage metrics for verification and test
Jenihhin, M., Raik, J., Chepurov, A., Reinsalu, U., Ubar, R.
Published in 2009 10th Latin American Test Workshop (01.03.2009)
Published in 2009 10th Latin American Test Workshop (01.03.2009)
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Conference Proceeding
On reusability of verification assertions for testing
Jenihhin, M., Raik, J., Ubar, R., Chepurov, A.
Published in 2008 11th International Biennial Baltic Electronics Conference (01.10.2008)
Published in 2008 11th International Biennial Baltic Electronics Conference (01.10.2008)
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Conference Proceeding
APRICOT: A framework for teaching digital systems verification
Raik, J., Jenihhin, M., Chepurov, A., Reinsalu, U., Ubar, R.
Published in 2008 19th EAEEIE Annual Conference (01.06.2008)
Published in 2008 19th EAEEIE Annual Conference (01.06.2008)
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Conference Proceeding
High-level decision diagram manipulations for code coverage analysis
Minakova, K., Reinsalu, U., Chepurov, A., Raik, J., Jenihhin, M., Ubar, R., Ellervee, P.
Published in 2008 11th International Biennial Baltic Electronics Conference (01.10.2008)
Published in 2008 11th International Biennial Baltic Electronics Conference (01.10.2008)
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Conference Proceeding