Reply to "Comment on 'A Compact Analytic Model of the Strain Field Induced by Through ilicon Vias"'
Sun-Rong Jan, Tien-Pei Chou, Che-Yu Yeh, Chee Wee Liu, Goldstein, Robert V., Gorodtsov, Valentin A., Shushpannikov, Pavel S.
Published in IEEE transactions on electron devices (01.09.2015)
Published in IEEE transactions on electron devices (01.09.2015)
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Journal Article
Modeling and Optimization of Edge Dislocation Stressors
Tsai, Ming-Heng, Jan, Sun-Rong, Yeh, Che-Yu, Liu, Chee Wee, Goldstein, Robert Veniaminovich, Gorodtsov, Valentin Alexandrovich, Shushpannikov, Pavel Sergeevich
Published in IEEE electron device letters (01.08.2013)
Published in IEEE electron device letters (01.08.2013)
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Journal Article
A novel approach for forming ductile Cu-to-Cu interconnection
Che-yu Yeh, Yi-kai Kuo, Shih-kang Lin
Published in 2016 International Conference on Electronics Packaging (ICEP) (01.04.2016)
Published in 2016 International Conference on Electronics Packaging (ICEP) (01.04.2016)
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Conference Proceeding
Ga-based submicron particle and applications
Liao, Hseng-ming, Yeh, Che-yu, Lin, Shih-kang
Published in 2018 International Conference on Electronics Packaging and iMAPS All Asia Conference (ICEP-IAAC) (01.04.2018)
Published in 2018 International Conference on Electronics Packaging and iMAPS All Asia Conference (ICEP-IAAC) (01.04.2018)
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Conference Proceeding
A novel TLP bonding based on sub-micron Ga particles
Lin, Shih-kang, Liao, Hseng-ming, Yeh, Che-yu, Yang, Chih-han
Published in 2019 International Conference on Electronics Packaging (ICEP) (01.04.2019)
Published in 2019 International Conference on Electronics Packaging (ICEP) (01.04.2019)
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Conference Proceeding
FPGA Implementation of Content-Based Music Retrieval Systems
Chien-Min Ou, Che-Yu Yeh, Yong-Long Su, Wen-Jyi Hwang, Jing-Fung Chen
Published in 2008 International Conference on Embedded Software and Systems Symposia (01.07.2008)
Published in 2008 International Conference on Embedded Software and Systems Symposia (01.07.2008)
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Conference Proceeding
STACKED VIA STRUCTURE DISPOSED ON A CONDUCTIVE PILLAR OF A SEMICONDUCTOR DIE
Chen, Tsung-Yu, Hsu, Li-Han, Tseng, Chien-Fu, Wu, Wei-Cheng, Yeh, Che-Yu, Lin, Tsung-Shu
Year of Publication 16.11.2023
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Year of Publication 16.11.2023
Patent
Stacked via structure disposed on a conductive pillar of a semiconductor die
Chen, Tsung-Yu, Hsu, Li-Han, Tseng, Chien-Fu, Wu, Wei-Cheng, Yeh, Che-Yu, Lin, Tsung-Shu
Year of Publication 12.09.2023
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Year of Publication 12.09.2023
Patent
STACKED VIA STRUCTURE
Chen, Tsung-Yu, Hsu, Li-Han, Tseng, Chien-Fu, Wu, Wei-Cheng, Yeh, Che-Yu, Lin, Tsung-Shu
Year of Publication 03.11.2022
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Year of Publication 03.11.2022
Patent
Electric connection and method of manufacturing the same
Chang, Hao-Miao, Wang, Mei-Jun, Yeh, Che-Yu, Cho, Cheng-Liang, Lin, Shih-Kang
Year of Publication 26.02.2019
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Year of Publication 26.02.2019
Patent
Through silicon via layout pattern
Huang, Chien-Hua, Sheu, Bing J, Liu, Chee Wee, Yeh, Che-Yu, Jan, Sun-Rong
Year of Publication 19.06.2018
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Year of Publication 19.06.2018
Patent
Method for forming semiconductor structure with epitaxial growth structure
Chen, Yen-Ming, Wu, Chung-Cheng, Yeh, Che-Yu, Chen, Cheng-Long, Tsai, Pang-Yen, Okuno, Yasutoshi, Wang, Ying-Hsuan, Chang, Gwan-Sin
Year of Publication 12.06.2018
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Year of Publication 12.06.2018
Patent
METHOD FOR FORMING SEMICONDUCTOR STRUCTURE WITH EPITAXIAL GROWTH STRUCTURE
YEH Che-Yu, CHEN Cheng-Long, OKUNO Yasutoshi, TSAI Pang-Yen, WANG Ying-Hsuan, CHEN Yen-Ming, CHANG Gwan-Sin, WU Chung-Cheng
Year of Publication 01.06.2017
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Year of Publication 01.06.2017
Patent
ELECTRIC CONNECTION AND METHOD OF MANUFACTURING THE SAME
CHO CHENG-LIANG, WANG MEI-JUN, CHANG HAO-MIAO, YEH CHE-YU, LLN SHIH-KANG
Year of Publication 05.05.2016
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Year of Publication 05.05.2016
Patent