Implementation of diode and bipolar triggered SCRs for CDM robust ESD protection in 90 nm CMOS ASICs
Brennan, Ciaran J., Chang, Shunhua, Woo, Min, Chatty, Kiran, Gauthier, Robert
Published in Microelectronics and reliability (01.07.2007)
Published in Microelectronics and reliability (01.07.2007)
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Journal Article
Conference Proceeding
Maximizing ESD robustness of current-mode-logic (CML) driver with internal gate bias network
You Li, Di Sarro, James, Shunhua Chang, Junjun Li, Gauthier, Robert, Halbach, Ralph
Published in 2013 35th Electrical Overstress/Electrostatic Discharge Symposium (01.09.2013)
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Published in 2013 35th Electrical Overstress/Electrostatic Discharge Symposium (01.09.2013)
Conference Proceeding
Maximizing ESD design window by optimizing gate bias for cascoded drivers in 45nm and beyond SOI technologies
Mitra, S, Gauthier, R, Shunhua Chang, Junjun Li, Halbach, R, Seguin, C
Published in Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2010 (01.10.2010)
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Published in Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2010 (01.10.2010)
Conference Proceeding
Predictive full circuit ESD simulation and analysis using extended ESD compact models: Methodology and tool implementation
Junjun Li, Gauthier, R, Joshi, A, Lundberg, M, Connor, J, Shunhua Chang, Mitra, S, Muhammad, M
Published in Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2010 (01.10.2010)
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Published in Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2010 (01.10.2010)
Conference Proceeding
ESD design automation for a 90nm ASIC design system
Brennan, C.J., Kozhaya, J., Proctor, R., Sloan, J., Shunhua Chang, Sundquist, J., Lowe, T.
Published in 2004 Electrical Overstress/Electrostatic Discharge Symposium (01.09.2004)
Published in 2004 Electrical Overstress/Electrostatic Discharge Symposium (01.09.2004)
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Conference Proceeding
SIGNAL AND POWER SUPPLY INTEGRATED ESD PROTECTION DEVICE
GAUTHIER JR. ROBERT, CHATTY KIRAN, CHANG SHUNHUA THOMAS, MUHAMMAD MUJAHID
Year of Publication 31.10.2011
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Year of Publication 31.10.2011
Patent
ESD design automation & methodology to prevent CDM failures in 130 & 90 nm ASIC design systems
Brennan, Ciaran J., Kozhaya, Joseph, Proctor, Robert, Sloan, Jeffrey, Chang, Shunhua, Sundquist, James, Lowe, Terry, Picozzi, David
Published in Journal of electrostatics (01.02.2006)
Published in Journal of electrostatics (01.02.2006)
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Journal Article
ESD design automation & methodology to prevent CDM failures in 130 & 90nm ASIC design systems
Brennan, Ciaran J., Kozhaya, Joseph, Proctor, Robert, Sloan, Jeffrey, Chang, Shunhua, Sundquist, James, Lowe, Terry, Picozzi, David
Published in Journal of electrostatics (01.02.2006)
Published in Journal of electrostatics (01.02.2006)
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Journal Article
APPARATUS AND METHOD TO PREVENT INTEGRATED CIRCUIT FROM ENTERING LATCH-UP MODE
Chang, Shunhua T, Yu, Mickey H, Muhammad, Mujahid, Lu, Xiangxiang, Gebreselasie, Ephrem G
Year of Publication 30.04.2020
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Year of Publication 30.04.2020
Patent
Apparatus and method to prevent integrated circuit from entering latch-up mode
Chang, Shunhua T, Yu, Mickey H, Muhammad, Mujahid, Lu, Xiangxiang, Gebreselasie, Ephrem G
Year of Publication 28.04.2020
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Year of Publication 28.04.2020
Patent
Integrated circuit protection during high-current ESD testing
Chang, Shunhua, Jack, Nathan, Gauthier, Jr., Robert J, Di Sarro, James Paul, Mitra, Souvick
Year of Publication 23.07.2019
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Year of Publication 23.07.2019
Patent
Integrated circuit protection during high-current ESD testing
Chang Shunhua, Di Sarro James Paul, Gauthier, Jr. Robert J, Mitra Souvick, Jack Nathan
Year of Publication 16.01.2018
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Year of Publication 16.01.2018
Patent
INTEGRATED CIRCUIT PROTECTION DURING HIGH-CURRENT ESD TESTING
GAUTHIER, JR. ROBERT J, JACK NATHAN, MITRA SOUVICK, CHANG SHUNHUA, DI SARRO JAMES PAUL
Year of Publication 12.04.2018
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Year of Publication 12.04.2018
Patent
INTEGRATED CIRCUIT PROTECTION DURING HIGH-CURRENT ESD TESTING
GAUTHIER, JR. ROBERT J, JACK NATHAN, MITRA SOUVICK, CHANG SHUNHUA, DI SARRO JAMES PAUL
Year of Publication 12.04.2018
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Year of Publication 12.04.2018
Patent
ROBUST ESD PROTECTION CIRCUIT, METHOD AND DESIGN STRUCTURE FOR TOLERANT AND FAILSAFE DESIGNS
GAUTHIER, ROBERT J, MUHAMAD, MUJAHID, CHANG, SHUNHUA T, LI, JUNJUN, CHATTY, KIRAN V, CAMPI, JOHN B
Year of Publication 21.11.2017
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Year of Publication 21.11.2017
Patent