4K-cells Resistive and Charge-Base-Capacitive Measurement Test Structure Array (R-CBCM-TSA) for CMOS Logic Process Development, Monitor and Model
Doong, K.Y.Y., Keh-Jeng Chang, Lin, S.-C., Tseng, H.C., Dagonis, A., Pan, S.
Published in 2009 IEEE International Conference on Microelectronic Test Structures (01.03.2009)
Published in 2009 IEEE International Conference on Microelectronic Test Structures (01.03.2009)
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Conference Proceeding
Field-configurable test structure array (FC-TSA): enabling design for monitor, model and manufacturability
Doong, K.Y.Y., Bordelon, J., Keh-Jeng Chang, Hung, L.J., Liao, C.C., Lin, S.C., Ho, R.S., Hsieh, S., Young, K.L.
Published in 2006 IEEE International Conference on Microelectronic Test Structures (2006)
Published in 2006 IEEE International Conference on Microelectronic Test Structures (2006)
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Conference Proceeding
Accurate 3-D capacitance extractions for advanced nanometer CMOS nodes
Keh-Jeng Chang, Shih-Hao Lee, Kuo-Fu Lee, Ping-Hung Yuh, Ho-Che Yu, Wen-Cheng Huang, Chang, Victor C. Y.
Published in 2015 International Symposium on VLSI Technology, Systems and Applications (01.04.2015)
Published in 2015 International Symposium on VLSI Technology, Systems and Applications (01.04.2015)
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Conference Proceeding
HEAT DISSIPATION IN SEMICONDUCTOR PACKAGES AND METHODS OF FORMING SAME
LEE JYH CHWEN FRANK, CHEN YU HAO, LU LEE CHUNG, CHANG KEH JENG, HUANG PO HSIANG, LU YII CHIAN, CHANG FONG YUAN
Year of Publication 04.02.2022
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Year of Publication 04.02.2022
Patent
Use of short-loop electrical measurements for yield improvement
Crid Yu, Tinaung Maung, Spanos, C.J., Boning, D.S., Chung, J.E., Hua-Yu Liu, Keh-Jeng Chang, Bartelink, D.J.
Published in IEEE transactions on semiconductor manufacturing (01.05.1995)
Published in IEEE transactions on semiconductor manufacturing (01.05.1995)
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Journal Article
Accurate 3-D capacitance extractions for advanced nanometer CMOS nodes
Keh-Jeng Chang, Shih-Hao Lee, Kuo-Fu Lee, Ping-Hung Yuh, Ho-Che Yu, Wen-Cheng Huang, Chang, Victor C. Y.
Published in VLSI Design, Automation and Test(VLSI-DAT) (01.04.2015)
Published in VLSI Design, Automation and Test(VLSI-DAT) (01.04.2015)
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Conference Proceeding
A UWB IR timed-array radar using time-shifted direct-sampling architecture
Chang-Ming Lai, Kai-Wen Tan, Liu-Yuan Yu, Yen-Ju Chen, Jun-Wei Huang, Shr-Chau Lai, Feng-Hsu Chung, Chia-Fung Yen, Jen-Ming Wu, Po-Chiun Huang, Keh-Jeng Chang, Shi-Yu Huang, Ta-Shun Chu
Published in 2012 Symposium on VLSI Circuits (VLSIC) (01.06.2012)
Published in 2012 Symposium on VLSI Circuits (VLSIC) (01.06.2012)
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Conference Proceeding
Modeling Sub-90nm On-Chip Variation Using Monte Carlo Method for DFM
Huang, J.-F., Chang, V.C.Y., Liu, S., Doong, K.Y.Y., Chang, K.-J.
Published in 2007 Asia and South Pacific Design Automation Conference (01.01.2007)
Published in 2007 Asia and South Pacific Design Automation Conference (01.01.2007)
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Conference Proceeding