Optimization with photonic wave-based annealers
Prabhakar, A., Shah, P., Gautham, U., Natarajan, V., Ramesh, V., Chandrachoodan, N., Tayur, S.
Published in Philosophical transactions of the Royal Society of London. Series A: Mathematical, physical, and engineering sciences (23.01.2023)
Published in Philosophical transactions of the Royal Society of London. Series A: Mathematical, physical, and engineering sciences (23.01.2023)
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Journal Article
Algorithm and VLSI architecture for high performance adaptive video scaling
Raghupathy, A., Chandrachoodan, N., Liu, K.J. Ray
Published in IEEE transactions on multimedia (01.12.2003)
Published in IEEE transactions on multimedia (01.12.2003)
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Journal Article
The hierarchical timing pair model for multirate DSP applications
Chandrachoodan, N., Bhattacharyya, S.S., Liu, K.J. Ray
Published in IEEE transactions on signal processing (01.05.2004)
Published in IEEE transactions on signal processing (01.05.2004)
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Journal Article
An investigation of passive optical networks for India based neutrino observatory
Singh, V. P., Chandrachoodan, N., Prabhakar, A.
Published in 2013 IEEE International Conference on Electronics, Computing and Communication Technologies (01.01.2013)
Published in 2013 IEEE International Conference on Electronics, Computing and Communication Technologies (01.01.2013)
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Conference Proceeding
Journal Article
A Novel Event Based Simulation Algorithm for Sequential Digital Circuit Simulation
Parashar, K N, Chandrachoodan, N
Published in 2007 International Conference on Field Programmable Logic and Applications (01.08.2007)
Published in 2007 International Conference on Field Programmable Logic and Applications (01.08.2007)
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Conference Proceeding
GPU Implementation of a Programmable Turbo Decoder for Software Defined Radio Applications
Yoge, D. R. N., Chandrachoodan, N.
Published in 2012 25th International Conference on VLSI Design (01.01.2012)
Published in 2012 25th International Conference on VLSI Design (01.01.2012)
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Conference Proceeding
Efficient Implementation of Floating-Point Reciprocator on FPGA
Kumar Jaiswal, M., Chandrachoodan, N.
Published in 2009 22nd International Conference on VLSI Design (01.01.2009)
Published in 2009 22nd International Conference on VLSI Design (01.01.2009)
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Conference Proceeding
Layout-Aware and Programmable Memory BIST Synthesis for Nanoscale System-on-Chip Designs
Kokrady, A., Ravikumar, C.P., Chandrachoodan, N.
Published in 2008 17th Asian Test Symposium (01.11.2008)
Published in 2008 17th Asian Test Symposium (01.11.2008)
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Conference Proceeding
Memory Yield Improvement through Multiple Test Sequences and Application-Aware Fault Models
Kokrady, A., Ravikumar, C.P., Chandrachoodan, N.
Published in 21st International Conference on VLSI Design (VLSID 2008) (01.01.2008)
Published in 21st International Conference on VLSI Design (VLSID 2008) (01.01.2008)
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Conference Proceeding
An efficient timing model for hardware implementation of multirate dataflow graphs
Chandrachoodan, Nitin, Bhattacharyaa, Shuvra S, Liu, K.J. Ray
Published in 2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221) (2001)
Published in 2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221) (2001)
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Conference Proceeding
Post-Synthesis Circuit Techniques for Runtime Leakage Reduction
Potluri, S., Chandrachoodan, N., Kamakoti, V.
Published in 2011 IEEE Computer Society Annual Symposium on VLSI (01.07.2011)
Published in 2011 IEEE Computer Society Annual Symposium on VLSI (01.07.2011)
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Conference Proceeding
The hierarchical timing pair model
Chandrachoodan, N., Bhattacharyya, S. S., Liu, K. J. R.
Published in ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196) (2001)
Published in ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196) (2001)
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Conference Proceeding