Test-Volume Reduction in Systems-on-a-Chip Using Heterogeneous and Multilevel Compression Techniques
Lingappan, L., Ravi, S., Raghunathan, A., Jha, N.K., Chakradhar, S.T.
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.10.2006)
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.10.2006)
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Journal Article
Cypress: compression and encryption of data and code for embedded multimedia systems
Lekatsas, H., Henkel, J., Chakradhar, S.T., Jakkula, V.
Published in IEEE design & test of computers (01.09.2004)
Published in IEEE design & test of computers (01.09.2004)
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Journal Article
A methodology for architectural design of multimedia multiprocessor SoCs
Lv, T., Ozer, I.B., Chakradhar, S.T., Jiang Xu, Wolf, W., Henkel, J.
Published in IEEE design & test of computers (01.01.2005)
Published in IEEE design & test of computers (01.01.2005)
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Journal Article
Power monitors: a framework for system-level power estimation using heterogeneous power models
Bansal, N., Lahiri, K., Raghunathan, A., Chakradhar, S.T.
Published in 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (2005)
Published in 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (2005)
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Conference Proceeding
Zero Cost Test Point Insertion Technique to Reduce Test Set Size and Test Generation Time for Structured ASICs
Sethuram, R., Seongmoon Wang, Chakradhar, S.T., Bushnell, M.L.
Published in 2006 15th Asian Test Symposium (01.11.2006)
Published in 2006 15th Asian Test Symposium (01.11.2006)
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Conference Proceeding
Unknown Blocking Scheme for Low Control Data Volume and High Observability
Seongmoon Wang, Wenlong Wei, Chakradhar, S.T.
Published in 2007 Design, Automation & Test in Europe Conference & Exhibition (01.04.2007)
Published in 2007 Design, Automation & Test in Europe Conference & Exhibition (01.04.2007)
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Conference Proceeding
Logic simulation and parallel processing
Agrawal, V.D., Chakradhar, S.T.
Published in 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers (1990)
Published in 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers (1990)
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Conference Proceeding
A High Compression and Short Test Sequence Test Compression Technique to Enhance Compressions of LFSR Reseeding
Seongmoon Wang, Wenlong Wei, Chakradhar, S.T.
Published in 16th Asian Test Symposium (ATS 2007) (01.10.2007)
Published in 16th Asian Test Symposium (ATS 2007) (01.10.2007)
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Conference Proceeding
PIDISC: pattern independent design independent seed compression technique
Balakrishnan, K.J., Seongmoon Wang, Chakradhar, S.T.
Published in 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) (2006)
Published in 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) (2006)
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Conference Proceeding
A low cost test data compression technique for high n-detection fault coverage
Seongmoon Wang, Zhanglei Wang, Wenlong Wei, Chakradhar, S.T.
Published in 2007 IEEE International Test Conference (01.10.2007)
Published in 2007 IEEE International Test Conference (01.10.2007)
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Conference Proceeding
Efficient Unknown Blocking Using LFSR Reseeding
Seongmoon Wang, Balakrishnan, B.J., Chakradhar, S.T.
Published in Proceedings of the Design Automation & Test in Europe Conference (2006)
Published in Proceedings of the Design Automation & Test in Europe Conference (2006)
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Conference Proceeding
XWRC: externally-loaded weighted random pattern testing for input test data compression
Seongmoon Wang, Balakrishnan, K.J., Chakradhar, S.T.
Published in IEEE International Conference on Test, 2005 (2005)
Published in IEEE International Conference on Test, 2005 (2005)
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Conference Proceeding
Distance restricted scan chain reordering to enhance delay fault coverage
Wei Li, Seongmoon Wang, Chakradhar, S.T., Reddy, S.M.
Published in 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (2005)
Published in 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (2005)
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Conference Proceeding
Zero Cost Test Point Insertion Technique for Structured ASICs
Sethuram, R., Seongmoon Wang, Chakradhar, S.T., Bushnell, M.L.
Published in 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) (01.01.2007)
Published in 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) (01.01.2007)
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Conference Proceeding
Peripheral partitioning and tree decomposition for partial scan
Balakrishnan, A., Chakradhar, S.T.
Published in Proceedings Eleventh International Conference on VLSI Design (1998)
Published in Proceedings Eleventh International Conference on VLSI Design (1998)
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Conference Proceeding
Software architecture exploration for high-performance security processing on a multiprocessor mobile SoC
Arora, Divya, Raghunathan, Anand, Ravi, Srivaths, Sankaradass, Murugan, Jha, Niraj K., Chakradhar, Srimat T.
Published in 2006 43rd ACM/IEEE Design Automation Conference (24.07.2006)
Published in 2006 43rd ACM/IEEE Design Automation Conference (24.07.2006)
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Conference Proceeding