Distributed data cache designs for clustered VLIW processors
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Anaphase: A Fine-Grain Thread Decomposition Scheme for Speculative Multithreading
Madriles, C., Lopez, P., Codina, J.M., Gibert, E., Latorre, F., Martinez, A., Martinez, R., Gonzalez, A.
Published in 2009 18th International Conference on Parallel Architectures and Compilation Techniques (01.01.2009)
Published in 2009 18th International Conference on Parallel Architectures and Compilation Techniques (01.01.2009)
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Conference Proceeding
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Merging level cache and data cache units having indicator bits related to speculative execution
Lopez, Pedro, Codina, Enric Gibert, Madriles, Carlos, Latorre, Fernando, Martinez, Raul, Codina, Josep M, Vincente, Alejandro Martinez, Gonzalez, Antonio
Year of Publication 14.04.2020
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Year of Publication 14.04.2020
Patent
HW/SW co-designed processors: Challenges, design choices and a simulation infrastructure for evaluation
Kumar, Rakesh, Cano, Jose, Brankovic, Aleksandar, Pavlou, Demos, Stavrou, Kyriakos, Gibert, Enric, Martinez, Alejandro, Gonzalez, Antonio
Published in 2017 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) (01.04.2017)
Published in 2017 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) (01.04.2017)
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Conference Proceeding
Method and apparatus for improved thread selection
Ramirez, Tanausu, Codina, Enric Gibert, Gonzalez-Alberquilla, Rekai, Codina, Josep M
Year of Publication 29.05.2018
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Year of Publication 29.05.2018
Patent
Quantitative characterization of the software layer of a HW/SW co-designed processor
Cano, Jose, Kumar, Rakesh, Brankovic, Aleksandar, Pavlou, Demos, Stavrouz, Kyriakos, Gibert, Enric, Martınez, Alejandro, Gonzalez, Antonio
Published in 2016 IEEE International Symposium on Workload Characterization (IISWC) (01.09.2016)
Published in 2016 IEEE International Symposium on Workload Characterization (IISWC) (01.09.2016)
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Conference Proceeding
Flexible compiler-managed L0 buffers for clustered VLIW processors
Gibert, E., Sanchez, J., Gonzalez, A.
Published in Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36 (2003)
Published in Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36 (2003)
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Conference Proceeding
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Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor
Gibert, E., Sanchez, J., Gonzalez, A.
Published in 35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings (2002)
Published in 35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings (2002)
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Conference Proceeding
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Utilization of register checkpointing mechanism with pointer swapping to resolve multithreading mis-speculations
Lopez Pedro, Latorre Fernando, Madriles Carlos, Martinez Raul, Codina Enric Gibert, Codina Josep M, Gonzalez Antonio, Martinez Alejandro
Year of Publication 10.04.2018
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Year of Publication 10.04.2018
Patent
Variable-based multi-module data caches for clustered VLIW processors
Gibert, E., Abella, J., Sanchez, J., Vera, X., Gonzalez, A.
Published in 14th International Conference on Parallel Architectures and Compilation Techniques (PACT'05) (2005)
Published in 14th International Conference on Parallel Architectures and Compilation Techniques (PACT'05) (2005)
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Conference Proceeding
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Combined floating point multiplier adder with intermediate rounding logic
LUPON MARC, STAVROU KYRIAKOS A, SAMUDRALA SRIDHAR, MARTINEZ RAUL, CODINA ENRIC GIBERT, MAGKLIS GRIGORIOS
Year of Publication 12.07.2016
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Year of Publication 12.07.2016
Patent
Local scheduling techniques for memory coherence in a clustered VLIW processor with a distributed data cache
Gibert, E., Sanchez, J., Gonzalez, A.
Published in International Symposium on Code Generation and Optimization, 2003. CGO 2003 (2003)
Published in International Symposium on Code Generation and Optimization, 2003. CGO 2003 (2003)
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Conference Proceeding
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METHOD AND APPARATUS FOR IMPROVED THREAD SELECTION
RAMIREZ TANAUSU, GONZALEZ-ALBERQUILLA REKAI, CODINA JOSEP M, CODINA ENRIC GIBERT
Year of Publication 31.03.2016
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Year of Publication 31.03.2016
Patent
Systems, Methods, and Apparatuses to Decompose a Sequential Program Into Multiple Threads, Execute Said Threads, and Reconstruct the Sequential Execution
LATORRE FERNANDO, GONZALEZ ANTONIO, LOPEZ PEDRO, MADRILES CARLOS, CODINA JOSEP M, VINCENTE ALEJANDRO MARTINEZ, MARTINEZ RAUL, CODINA ENRIC GIBERT
Year of Publication 09.06.2016
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Year of Publication 09.06.2016
Patent