Checkpoint table for selective instruction flushing in a speculative execution unit
CHEONG; HOICHI, BROOKS; JEFFREY SCOTT, GALAMBOS; TIBERIU CAROL, OLSON; CHRISTOPHER HANS
Year of Publication 05.10.1999
Get full text
Year of Publication 05.10.1999
Patent
METHOD AND SYSTEM FOR REDUCING DISPATCH LATENCY IN A PROCESSOR
POTTERM TERENCE MATTHEW, OLSON, CHRISTOPHER HANS, MUHICH, JOHN STEPHEN, ELLIOT, TIMOTHY ALAN
Year of Publication 15.05.1999
Get full text
Year of Publication 15.05.1999
Patent
Floating point split multiply/add system which has infinite precision
OLSON; CHRISTOPHER HANS, GOLLA; ROBERT THADDEUS, POTTER; TERENCE MATTHEW, ELLIOTT; TIMOTHY ALAN
Year of Publication 09.03.1999
Get full text
Year of Publication 09.03.1999
Patent
Method and system for high performance dynamic and user programmable cache arbitration
LOPER; ALBERT JOHN, OLSON; CHRISTOPHER HANS, SHIPPY; DAVID J, ELLIOTT; TIMOTHY ALAN
Year of Publication 13.10.1998
Get full text
Year of Publication 13.10.1998
Patent
Method and system for performing a high speed floating point add operation
EISEN; LEE EVAN, OLSON; CHRISTOPHER HANS, GOLLA; ROBERT THADDEUS, ELLIOTT; TIMOTHY ALAN
Year of Publication 04.08.1998
Get full text
Year of Publication 04.08.1998
Patent
A method and system for reducing dispatch latency in a processor
OLSON, CHRISTOPHER HANS, MUHICH, JOHN STEPHEN, ELLIOT, TIMOTHY ALAN, POTTER, TERENCE MATTHEW
Year of Publication 28.05.1997
Get full text
Year of Publication 28.05.1997
Patent
A method and system for reducing dispatch latency in a processor
OLSON, CHRISTOPHER HANS, MUHICH, JOHN STEPHEN, ELLIOT, TIMOTHY ALAN, POTTER, TERENCE MATTHEW
Year of Publication 31.07.1996
Get full text
Year of Publication 31.07.1996
Patent