Programming Spiking Neural Networks on Intel's Loihi
Lin, Chit-Kwan, Wild, Andreas, Chinya, Gautham N., Cao, Yongqiang, Davies, Mike, Lavery, Daniel M., Wang, Hong
Published in Computer (Long Beach, Calif.) (01.03.2018)
Published in Computer (Long Beach, Calif.) (01.03.2018)
Get full text
Journal Article
Design Considerations for Edge Neural Network Accelerators: An Industry Perspective
Raha, Arnab, Kim, Sang Kyun, Mathaikutty, Deepak A., Venkataramanan, Guruguhanathan, Mohapatra, Debabrata, Sung, Raymond, Brick, Cormac, Chinya, Gautham N.
Published in 2021 34th International Conference on VLSI Design and 2021 20th International Conference on Embedded Systems (VLSID) (01.02.2021)
Published in 2021 34th International Conference on VLSI Design and 2021 20th International Conference on Embedded Systems (VLSID) (01.02.2021)
Get full text
Conference Proceeding
SYNCRONIZATION OF INTERRUPT PROCESSING TO REDUCE POWER CONSUMPTION
SUN HUAJIN, HAMMARLUND PER, WANG HONG, LOH THIAM WAH, CHINYA GAUTHAM N, FORTAS REZA
Year of Publication 21.09.2016
Get full text
Year of Publication 21.09.2016
Patent
PROVIDING HARDWARE SUPPORT FOR SHARED VIRTUAL MEMORY BETWEEN LOCAL PHYSICAL MEMORY AND REMOTE PHYSICAL MEMORY
MATHAIKUTTY DEEPAK A, HELD JAMES P, HAUN WARNE, SCHUCHMAN ETHAN, CHINYA GAUTHAM N, BHATT AJAY V, SETHI PRASHANT, COLLINS JAMISON D, WHALLEY STEPHEN F
Year of Publication 27.07.2015
Get full text
Year of Publication 27.07.2015
Patent
SYNCRONIZATION OF INTERRUPT PROCESSING TO REDUCE POWER CONSUMPTION
HAMMARLUND, Per, FORTAS, Reza, LOH, Thiam Wah, SUN, Huajin, CHINYA, Gautham N, WANG, Hong
Year of Publication 09.11.2022
Get full text
Year of Publication 09.11.2022
Patent
Prefetcher for delinquent irregular loads
Naeimi, Helia, Sankaranarayanan, Karthik, Tarsa, Stephen J, Chinya, Gautham N
Year of Publication 14.07.2020
Get full text
Year of Publication 14.07.2020
Patent
PREFETCHER FOR DELINQUENT IRREGULAR LOADS
CHINYA, Gautham N, SANKARANARAYANAN, Karthik, TARSA, Stephen J, NAEIMI, Helia
Year of Publication 02.01.2020
Get full text
Year of Publication 02.01.2020
Patent
PREFETCHER FOR DELINQUENT IRREGULAR LOADS
CHINYA, Gautham N, SANKARANARAYANAN, Karthik, TARSA, Stephen J, NAEIMI, Helia
Year of Publication 01.01.2020
Get full text
Year of Publication 01.01.2020
Patent
Reducing microprocessor power with minimal performance impact by dynamically adapting runtime operating configurations using machine learning
Sebot, Julien, Chowdhury, Rangeen Basu Roy, Miftakhutdinov, Rustam, Donkoh, Eric, Tarsa, Stephen J, Chinya, Gautham N
Year of Publication 29.06.2021
Get full text
Year of Publication 29.06.2021
Patent
Multiple Instruction Stream Processor
Hankins, Richard A., Chinya, Gautham N., Collins, Jamison D., Wang, Perry H., Rakvic, Ryan, Wang, Hong, Shen, John P.
Published in 33rd International Symposium on Computer Architecture (ISCA'06) (01.05.2006)
Published in 33rd International Symposium on Computer Architecture (ISCA'06) (01.05.2006)
Get full text
Conference Proceeding
REDUCING MICROPROCESSOR POWER WITH MINIMAL PERFORMANCE IMPACT BY DYNAMICALLY ADAPTING RUNTIME OPERATING CONFIGURATIONS USING MACHINE LEARNING
Sebot, Julien, Chowdhury, Rangeen Basu Roy, Miftakhutdinov, Rustam, Donkoh, Eric, Tarsa, Stephen J, Chinya, Gautham N
Year of Publication 11.06.2020
Get full text
Year of Publication 11.06.2020
Patent