Characterization and Modeling of Flicker Noise in FinFETs at Advanced Technology Node
Kushwaha, Pragya, Agarwal, Harshit, Lin, Yen-Kai, Dasgupta, Avirup, Kao, Ming-Yen, Lu, Ye, Yue, Yun, Chen, Xiaonan, Wang, Joseph, Sy, Wing, Yang, Frank, Chidambaram, PR. Chidi, Salahuddin, Sayeef, Hu, Chenming
Published in IEEE electron device letters (01.06.2019)
Published in IEEE electron device letters (01.06.2019)
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Journal Article
Investigation of electrically gate-all-around hexagonal nanowire FET (HexFET) architecture for 5 nm node logic and SRAM applications
Smith, Jeffrey A., Ni, Kai, Ghosh, Ram Krishna, Xu, Jeff, Badaroglu, Mustafa, Chidi Chidambaram, P.R., Datta, Suman
Published in 2017 47th European Solid-State Device Research Conference (ESSDERC) (01.09.2017)
Published in 2017 47th European Solid-State Device Research Conference (ESSDERC) (01.09.2017)
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Conference Proceeding
PPAC scaling enablement for 5nm mobile SoC technology
Badaroglu, Mustafa, Xu, Jeff, Zhu, John, Da Yang, Bao, Jerry, Seung-Chul Song, Peijie Feng, Ritzenthaler, Romain, Mertens, Hans, Eneman, Geert, Horiguchi, Naoto, Smith, Jeffrey, Datta, Suman, Kohen, David, Po-Wen Chan, Keagan Chen, Chidi Chidambaram, P. R.
Published in 2017 47th European Solid-State Device Research Conference (ESSDERC) (01.09.2017)
Published in 2017 47th European Solid-State Device Research Conference (ESSDERC) (01.09.2017)
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Conference Proceeding
Comparative Analysis of Semiconductor Device Architectures for 5-nm Node and Beyond
Peijie Feng, Seung-Chul Song, Nallapati, Giri, Zhu, John, Bao, Jerry, Moroz, Victor, Munkang Choi, Xi-Wei Lin, Qiang Lu, Colombeau, Benjamin, Breil, Nicolas, Chudzik, Michael, Chidambaram, Chidi
Published in IEEE electron device letters (01.12.2017)
Published in IEEE electron device letters (01.12.2017)
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Journal Article
A Novel Framework for DTCO: Fast and Automatic Routability Assessment with Machine Learning for Sub-3nm Technology Options
Chidambaram, Chidi, Kahng, Andrew B., Kim, Minsoo, Nallapati, Giri, Song, S.C., Woo, Mingyu
Published in 2021 Symposium on VLSI Technology (13.06.2021)
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Published in 2021 Symposium on VLSI Technology (13.06.2021)
Conference Proceeding
Improved device variability in scaled MOSFETs with deeply retrograde channel profile : RELIABILITY AND VARIABILITY OF DEVICES FOR CIRCUITS AND SYSTEMS
WOO, Jason, CHIEN, P. Y, YANG, Frank, SONG, S. C, CHIDAMBARAM, Chidi, WANG, Joseph, YEAP, Geoffrey
Published in Microelectronics and reliability (2014)
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Published in Microelectronics and reliability (2014)
Journal Article
Improved device variability in scaled MOSFETs with deeply retrograde channel profile
Woo, Jason, Chien, P.Y., Yang, Frank, Song, S.C., Chidambaram, Chidi, Wang, Joseph, Yeap, Geoffrey
Published in Microelectronics and reliability (01.06.2014)
Published in Microelectronics and reliability (01.06.2014)
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Journal Article
5G and AI Integrated High Performance Mobile SoC Process-Design Co-Development and Production with 7nm EUV FinFET Technology
Deng, Jie, Roh, Ukjin, Bao, Jerry, Suh, Youseok, Choi, Jihong, Chen, Ying, Lin, Vicki, Cheng, Jason, Song, Zhimin, Cai, Ming, Ge, Lixin, Chen, Gary, Kim, Leo, Wang, Hao, Song, S. C., Sharma, Deepak, Wang, Xiao-Yong, Song, Byungmoo, Masuoka, Yuri Y., Lee, Kwon, Kim, Sungwon, Lee, Jinkyu, Jin, Hyejun, Boynapalli, Venu, Narayanan, Rajagopal, Penzes, Paul, Nallapati, Giri, Chidambaram, Chidi
Published in 2020 IEEE Symposium on VLSI Technology (01.06.2020)
Published in 2020 IEEE Symposium on VLSI Technology (01.06.2020)
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Conference Proceeding
10nm high performance mobile SoC design and technology co-developed for performance, power, and area scaling
Sam Yang, Yanxiang Liu, Ming Cai, Jerry Bao, Peijie Feng, Xiangdong Chen, Lixin Ge, Jun Yuan, Jihong Choi, Ping Liu, Youseok Suh, Hao Wang, Jie Deng, Yandong Gao, Yang, Jackie, Xiao-Yong Wang, Da Yang, Zhu, John, Penzes, Paul, Song, S. C., Park, Chulyong, Sungwon Kim, Jedon Kim, Sunggun Kang, Terzioglu, Esin, Ken Rim, Chidi Chidambaram, P. R.
Published in 2017 Symposium on VLSI Technology (01.06.2017)
Published in 2017 Symposium on VLSI Technology (01.06.2017)
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Conference Proceeding
Silicon Process Impact on 5G NR mmWave Front End Design and Performance
Cheng, Chuan-Cheng, Dunworth, Jeremy, Kalpat, Sriram, Cheng, Haitao, Liu, Gang, Yang, Ming-Ta, Sy, Wing, Wang, Joseph, Sahota, Kamal, Chidambaram, PR. Chidi
Published in 2019 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) (01.04.2019)
Published in 2019 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) (01.04.2019)
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Conference Proceeding
Chip-scale modeling of electroplated copper surface profiles
PARK, Tae, TUGBAWA, Tamba, BONING, Duane, CHIDAMBARAM, Chidi, BORST, Chris, SHIN, Gregg
Published in Journal of the Electrochemical Society (2004)
Published in Journal of the Electrochemical Society (2004)
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Journal Article
System Design Technology Co-Optimization for 3D Integration at <5nm nodes
Song, S.C., Nallapati, Giri, Khan, Irfan, Nikfar, Nader, Yan, Bohan, Miranda, Miguel, Lim, Bruce, Nagarajan, Mali, Park, Joon-Young, Srinivas, Vaishnav, Langari, Reza, Chava, Bharani, Sanaka, Venu, Boynapalli, Venu, Gupta, Paras, Pandey, Shree, Xie, Biancun, Feng, Peijie, Choi, Jihong, Rakshit, Titash, Shenoy, Ravi, Nemani, Mahadev, Verrilli, Colin, Zhu, John, Chen, Jun, Nakamoto, Mark, Zhao, Lily, Sun, Yangyang, Atallah, Francois, Kim, Jonghae, Attar, Rashid, Chidambaram, Chidi
Published in 2021 IEEE International Electron Devices Meeting (IEDM) (11.12.2021)
Published in 2021 IEEE International Electron Devices Meeting (IEDM) (11.12.2021)
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Conference Proceeding
Low power embedded memory design - process to system level considerations
Terzioglu, E, Sei Seung Yoon, ChangHo Jung, Chaba, R, Boynapalli, V, Abu-Rahma, M, Wang, J, Yang, S, Nallapati, G, Thean, A, Chidambaram, C, Han, M, Yeap, G, Sani, M
Published in 2011 IEEE International Conference on IC Design & Technology (01.05.2011)
Published in 2011 IEEE International Conference on IC Design & Technology (01.05.2011)
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Conference Proceeding
ADAPTIVE PULSE GENERATION CIRCUITS FOR CLOCKING PULSE LATCHES WITH MINIMUM HOLD TIME
Nallapati Giridhar, Song Stanley Seungchul, Jeong Hanwool, Chidambaram Chidi, Jung Seong-Ook
Year of Publication 08.03.2018
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Year of Publication 08.03.2018
Patent
Silicon Process Impact on 5G NR mmWave Front End Design and Performance
Cheng, Chuan-Cheng, Dunworth, Jeremy, Kalpat, Sriram, Cheng, Haitao, Liu, Gang, Yang, Ming-Ta, Sy, Wing, Wang, Joseph, Sahota, Kamal, Chidambaram, PR. Chidi
Published in 2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) (01.04.2019)
Published in 2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) (01.04.2019)
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Conference Proceeding
MIDDLE-OF-LINE (MOL) METAL RESISTOR TEMPERATURE SENSORS FOR LOCALIZED TEMPERATURE SENSING OF ACTIVE SEMICONDUCTOR AREAS IN INTEGRATED CIRCUITS (ICs)
Lin Jiefeng Jeff, Nallapati Giridhar, Song Stanley Seungchul, Yuan Jun, Ge Lixin, Deng Jie, Yang Bin, Chidambaram Chidi, Yu Bo
Year of Publication 01.03.2018
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Year of Publication 01.03.2018
Patent