EXPLOITING FRAME TO FRAME COHERENCY IN A SORT-MIDDLE ARCHITECTURE
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Year of Publication 27.02.2019
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EXPLOITING FRAME TO FRAME COHERENCY IN A SORT-MIDDLE ARCHITECTURE
MARCUELLO PEDRO, CARRETERO CASADO JAVIER, FERNANDEZ JUAN, AKENINE MOLLER TOMAS G
Year of Publication 17.08.2017
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Year of Publication 17.08.2017
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EXPLOITING FRAME TO FRAME COHERENCY IN A SORT-MIDDLE ARCHITECTURE
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Year of Publication 23.11.2016
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DISABLING CACHE PORTIONS DURING LOW VOLTAGE OPERATIONS
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Year of Publication 09.06.2011
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Published in 2011 IEEE 17th International Symposium on High Performance Computer Architecture (01.02.2011)
Published in 2011 IEEE 17th International Symposium on High Performance Computer Architecture (01.02.2011)
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Conference Proceeding
EXPLOITING FRAME TO FRAME COHERENCY IN A SORT-MIDDLE ARCHITECTURE
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Year of Publication 02.12.2020
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Year of Publication 02.12.2020
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Capacity register file
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Year of Publication 10.07.2018
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Year of Publication 10.07.2018
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EXPLOITING FRAME TO FRAME COHERENCY IN A SORT-MIDDLE ARCHITECTURE
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Year of Publication 30.10.2018
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Year of Publication 30.10.2018
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Exploiting frame to frame coherency in a sort-middle architecture
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Year of Publication 10.04.2018
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Year of Publication 10.04.2018
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Exploiting frame to frame coherency in a sort-middle architecture
Fernandez Juan, Akenine-Moller Tomas G, Carretero Casado Javier, Marcuello Pedro
Year of Publication 20.03.2018
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Year of Publication 20.03.2018
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Exploiting frame to frame coherency in a sort-middle architecture
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Year of Publication 27.02.2018
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Year of Publication 27.02.2018
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Disabling cache portions during low voltage operations
Chaparro Monferrer, Pedro, De, Vivek, Wilkerson, Christopher, Khellah, Muhammad M, Abella, Jaume, Vera, Xavier, Carretero Casado, Javier, Zhang, Ming, Gonzalez, Antonio
Year of Publication 07.01.2020
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Year of Publication 07.01.2020
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EXPLOITING FRAME TO FRAME COHERENCY IN A SORT-MIDDLE ARCHITECTURE
MARCUELLO, Pedro, CARRETERO CASADO, Javier, FERNANDEZ, Juan, AKENINE-MÖLLER, Tomas G
Year of Publication 27.12.2017
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Year of Publication 27.12.2017
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Exploiting Frame To Frame Coherency In A Sort-Middle Architecture
MARCUELLO, Pedro, CARRETERO CASADO, Javier, FERNANDEZ, Juan, AKENINE-MÖLLER, Tomas G
Year of Publication 28.09.2017
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Year of Publication 28.09.2017
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TRAFFIC CONTROL ON AN ON-CHIP NETWORK
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Year of Publication 13.07.2017
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Year of Publication 13.07.2017
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Traffic control on an on-chip network
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Year of Publication 28.03.2017
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Year of Publication 28.03.2017
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