Dataflow object detection system for FPGA-based smart camera
Bourrasset, Cédric, Maggiani, Luca, Sérot, Jocelyn, Berry, François
Published in IET circuits, devices & systems (01.07.2016)
Published in IET circuits, devices & systems (01.07.2016)
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Journal Article
High-level dataflow programming for real-time image processing on smart cameras
Sérot, Jocelyn, Berry, François, Bourrasset, Cédric
Published in Journal of real-time image processing (01.12.2016)
Published in Journal of real-time image processing (01.12.2016)
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Journal Article
Design productivity of a high level synthesis compiler versus HDL
Pelcat, Maxime, Bourrasset, Cedric, Maggiani, Luca, Berry, Francois
Published in 2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) (01.07.2016)
Published in 2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) (01.07.2016)
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Conference Proceeding
FPGA-based smart camera mote for pervasive wireless network
Bourrasset, Cedric, Serot, Jocelyn, Berry, Francois
Published in 2013 Seventh International Conference on Distributed Smart Cameras (ICDSC) (01.10.2013)
Published in 2013 Seventh International Conference on Distributed Smart Cameras (ICDSC) (01.10.2013)
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Conference Proceeding
Distributed FPGA-based smart camera architecture for computer vision applications
Bourrasset, Cedric, Maggianiy, Luca, Serot, Jocelyn, Berry, Francois, Pagano, Paolo
Published in 2013 Seventh International Conference on Distributed Smart Cameras (ICDSC) (01.10.2013)
Published in 2013 Seventh International Conference on Distributed Smart Cameras (ICDSC) (01.10.2013)
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Conference Proceeding
DreamCAM: A FPGA-based platform for smart camera networks
Bourrasset, Cedric, Maggiani, Luca, Serot, Jocelyn, Berry, Francois, Pagano, Paolo
Published in 2013 Seventh International Conference on Distributed Smart Cameras (ICDSC) (01.10.2013)
Published in 2013 Seventh International Conference on Distributed Smart Cameras (ICDSC) (01.10.2013)
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Conference Proceeding
Requirements for an Enterprise AI Benchmark
Bourrasset, Cedric, Boillod-Cerneux, France, Sauge, Ludovic, Deldossi, Myrtille, Wellenreiter, Francois, Bordawekar, Rajesh, Malaika, Susan, Broyelle, Jean-Armand, West, Marc, Belgodere, Brian
Published in Performance Evaluation and Benchmarking for the Era of Artificial Intelligence (2019)
Published in Performance Evaluation and Benchmarking for the Era of Artificial Intelligence (2019)
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Book Chapter
Tactics to Directly Map CNN Graphs on Embedded FPGAs
Abdelouahab, K., Pelcat, M., Serot, J., Bourrasset, C., Berry, F.
Published in IEEE embedded systems letters (01.12.2017)
Published in IEEE embedded systems letters (01.12.2017)
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Journal Article
Hardware Automated Dataflow Deployment of CNNs
Kamel Abdelouahab, Pelcat, Maxime, Serot, Jocelyn, Bourrasset, Cedric, Jean-Charles, Quinton, Berry, François
Published in arXiv.org (29.06.2017)
Published in arXiv.org (29.06.2017)
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Paper
Journal Article
A Holistic Approach for Optimizing DSP Block Utilization of a CNN implementation on FPGA
Kamel Abdelouahab, Bourrasset, Cedric, Pelcat, Maxime, Berry, François, Jean-Charles, Quinton, Serot, Jocelyn
Published in arXiv.org (21.03.2017)
Published in arXiv.org (21.03.2017)
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Paper
Journal Article
Tactics to Directly Map CNN graphs on Embedded FPGAs
Kamel Abdelouahab, Pelcat, Maxime, Sérot, Jocelyn, Bourrasset, Cédric, Berry, François, Serot, Jocelyn
Published in arXiv.org (20.11.2017)
Published in arXiv.org (20.11.2017)
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Paper
Journal Article