A Hybrid Ring/Mesh Interconnect for Network-on-Chip Using Hierarchical Rings for Global Routing
Bourduas, S., Zilic, Z.
Published in First International Symposium on Networks-on-Chip (NOCS'07) (01.05.2007)
Published in First International Symposium on Networks-on-Chip (NOCS'07) (01.05.2007)
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Conference Proceeding
From MSC and UML to SDL
Bourduas, S., Khendek, F., Vincent, D.
Published in Proceedings - International Computer Software & Applications Conference (2002)
Published in Proceedings - International Computer Software & Applications Conference (2002)
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Conference Proceeding
Journal Article
A comparison of two multistage ring architectures for NoC using high-level simulation models
Bourduas, S., Zilic, Z.
Published in 2008 1st Microsystems and Nanoelectronics Research Conference (01.10.2008)
Published in 2008 1st Microsystems and Nanoelectronics Research Conference (01.10.2008)
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Conference Proceeding
Blocking-aware task assignment for wormhole routed network-on-chip
Bourduas, S., Chan, H., Zilic, Z.
Published in 2007 IEEE Northeast Workshop on Circuits and Systems (01.08.2007)
Published in 2007 IEEE Northeast Workshop on Circuits and Systems (01.08.2007)
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Conference Proceeding
Modeling and Evaluation of an Energy-Efficient Hierarchical Ring Interconnect for System-on-Chip Multiprocessors
Bourduas, S., Kuo, B., Zilic, Z., Manjikian, N.
Published in 2006 IEEE North-East Workshop on Circuits and Systems (01.06.2006)
Published in 2006 IEEE North-East Workshop on Circuits and Systems (01.06.2006)
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Conference Proceeding