Fault resilience analysis of a RISC-V microprocessor design through a dedicated UVM environment
Barbirotta, Marcello, Mastrandrea, Antonio, Menichelli, Francesco, Vigli, Francesco, Blasi, Luigi, Cheikh, Abdallah, Sordillo, Stefano, Di Gennaro, Fabio, Olivieri, Mauro
Published in 2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) (19.10.2020)
Published in 2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) (19.10.2020)
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