Gain scheduling controller for pitch control of a TRMS system
Bhagyalakshmi, R, Rashmi, GP, Pandian, B Jaganatha
Published in IOP conference series. Materials Science and Engineering (01.11.2017)
Published in IOP conference series. Materials Science and Engineering (01.11.2017)
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Journal Article
Machine Learning Based Indian Raga Classification and Detection
R, Bhagyalakshmi, B, Anandaraju M
Published in 2024 Asia Pacific Conference on Innovation in Technology (APCIT) (26.07.2024)
Published in 2024 Asia Pacific Conference on Innovation in Technology (APCIT) (26.07.2024)
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Conference Proceeding
Ayurgenomics for stratified medicine: TRISUTRA consortium initiative across ethnically and geographically diverse Indian populations
Prasher, Bhavana, Varma, Binuja, Kumar, Arvind, Khuntia, Bharat Krushna, Pandey, Rajesh, Narang, Ankita, Tiwari, Pradeep, Kutum, Rintu, Guin, Debleena, Kukreti, Ritushree, Dash, Debasis, Mukerji, Mitali
Published in Journal of ethnopharmacology (02.02.2017)
Published in Journal of ethnopharmacology (02.02.2017)
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Journal Article
The outcome of exclusive breast feeding in infants born to HIV positive mothers on ART under SISU RAKSHA program, Bapuji child health institute, Davangere
R. T., Bhagyalakshmi, Manjunath, T. P., Banapurmath, C. R., S., Mruthunjaya
Published in International Journal Of Community Medicine And Public Health (28.03.2017)
Published in International Journal Of Community Medicine And Public Health (28.03.2017)
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Journal Article
OPTIMIZED MULTIPLIER USING REVERSIBLE MULTI-CONTROL INPUT TOFFOLI GATES
Bhagyalakshmi, H R, Venkatesha, M K
Published in International journal of VLSI design & communication systems (01.12.2012)
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Published in International journal of VLSI design & communication systems (01.12.2012)
Journal Article
Design of Parity Preserving Logic Based Fault Tolerant Reversible Arithmetic Logic Unit
Saligram, Rakshith, Shridhar Hegde, Shrihari, A Kulkarni, Shashidhar, H.R, Bhagyalakshmi, M.K, Venkatesha
Published in International journal of VLSI design & communication systems (30.06.2013)
Published in International journal of VLSI design & communication systems (30.06.2013)
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Journal Article
Design of Parity Preserving Logic Based Fault Tolerant Reversible Arithmetic Logic Unit
Saligram, Rakshith, Hegde, Shrihari Shridhar, Kulkarni, Shashidhar A, Bhagyalakshmi, H. R, Venkatesha, M. K
Year of Publication 13.07.2013
Year of Publication 13.07.2013
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Journal Article