A tool for the automatic TLM-to-RTL conversion of embedded systems requirements for a seamless verification flow
Bel Hadj Amor, Zeineb, Pierre, Laurence, Borrione, Dominique
Published in 2014 22nd International Conference on Very Large Scale Integration (VLSI-SoC) (01.10.2014)
Published in 2014 22nd International Conference on Very Large Scale Integration (VLSI-SoC) (01.10.2014)
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Conference Proceeding
Automatic refinement of requirements for verification throughout the SoC design flow
Pierre, Laurence, Amor, Zeineb Bel Hadj
Published in Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (29.09.2013)
Published in Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (29.09.2013)
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Conference Proceeding
System-on-chip verification: TLM-to-RTL assertions transformation
Bel Hadj Amor, Zeineb, Pierre, Laurence, Borrione, Dominique
Published in 2014 10th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME) (01.06.2014)
Published in 2014 10th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME) (01.06.2014)
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Conference Proceeding
Integrating PSL properties into SystemC transactional modeling - Application to the verification of a modem SoC
Pierre, L., Ferro, L., Bel Hadj Amor, Zeineb, Bourgon, P., Quevremont, J.
Published in 7th IEEE International Symposium on Industrial Embedded Systems (SIES'12) (01.06.2012)
Published in 7th IEEE International Symposium on Industrial Embedded Systems (SIES'12) (01.06.2012)
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Conference Proceeding