On the Test and Mitigation of Malfunctions in Low-Power SRAMs
Bonet Zordan, L. H., Bosio, A., Dilillo, L., Girard, P., Virazel, A., Badereddine, N.
Published in Journal of electronic testing (01.10.2014)
Published in Journal of electronic testing (01.10.2014)
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Journal Article
A Selective Scan Slice Encoding Technique for Test Data Volume and Test Power Reduction
Badereddine, N., Wang, Z., Girard, P., Chakrabarty, K., Virazel, A., Pravossoudovitch, S., Landrault, C.
Published in Journal of electronic testing (01.08.2008)
Published in Journal of electronic testing (01.08.2008)
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Journal Article
A statistical simulation method for reliability analysis of SRAM core-cells
Fonseca, R A, Dilillo, L, Bosio, A, Girard, Patrick, Pravossoudovitch, S, Virazel, A, Badereddine, N
Published in Design Automation Conference (01.06.2010)
Published in Design Automation Conference (01.06.2010)
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Conference Proceeding
Detecting NBTI induced failures in SRAM core-cells
Fonseca, R Alves, Dilillo, L, Bosio, A, Girard, P, Pravossoudovitch, S, Virazel, A, Badereddine, N
Published in 2010 28th VLSI Test Symposium (VTS) (01.04.2010)
Published in 2010 28th VLSI Test Symposium (VTS) (01.04.2010)
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Conference Proceeding
Analysis of resistive-bridging defects in SRAM core-cells: A comparative study from 90nm down to 40nm technology nodes
Fonseca, R Alves, Dilillo, L, Bosio, A, Girard, P, Pravossoudovitch, S, Virazel, A, Badereddine, N
Published in 2010 15th IEEE European Test Symposium (01.05.2010)
Published in 2010 15th IEEE European Test Symposium (01.05.2010)
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Conference Proceeding
Optimized march test flow for detecting memory faults in SRAM devices under bit line coupling
Zordan, L B, Bosio, A, Dilillo, L, Girard, P, Pravossoudovitch, S, Virazel, A, Badereddine, N
Published in 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (01.04.2011)
Published in 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (01.04.2011)
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Conference Proceeding
Setting test conditions for improving SRAM reliability
Fonseca, R Alves, Dilillo, L, Bosio, A, Girard, P, Pravossoudovitch, S, Virazel, A, Badereddine, N
Published in 2010 15th IEEE European Test Symposium (01.05.2010)
Published in 2010 15th IEEE European Test Symposium (01.05.2010)
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Conference Proceeding
Minimizing Peak Power Consumption during Scan Testing: Structural Technique for Don't Care Bits Assignment
Badereddine, N., Girard, P., Pravossoudovitch, S., Landrault, C., Virazel, A., Wunderlich, H.-J.
Published in 2006 Ph.D. Research in Microelectronics and Electronics (2006)
Published in 2006 Ph.D. Research in Microelectronics and Electronics (2006)
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Conference Proceeding
Adaptive Source Bias for Improved Resistive-Open Defect Coverage during SRAM Testing
Vatajelu, Elena I., Dilillo, L., Bosio, A., Girard, P., Todri, A., Virazel, A., Badereddine, N.
Published in 2013 22nd Asian Test Symposium (01.11.2013)
Published in 2013 22nd Asian Test Symposium (01.11.2013)
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Conference Proceeding
Low-power SRAMs power mode control logic: Failure analysis and test solutions
Zordan, L. B., Bosio, A., Dilillo, L., Girard, P., Todri, A., Virazel, A., Badereddine, N.
Published in 2012 IEEE International Test Conference (01.11.2012)
Published in 2012 IEEE International Test Conference (01.11.2012)
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Conference Proceeding
On the reuse of read and write assist circuits to improve test efficiency in low-power SRAMs
Zordan, L. B., Bosio, A., Dilillo, L., Girard, P., Todri, A., Virazel, A., Badereddine, N.
Published in 2013 IEEE International Test Conference (ITC) (01.09.2013)
Published in 2013 IEEE International Test Conference (ITC) (01.09.2013)
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Conference Proceeding
A built-in scheme for testing and repairing voltage regulators of low-power srams
Zordan, L. B., Bosio, A., Dilillo, L., Girard, P., Todri, A., Virazel, A., Badereddine, N.
Published in 2013 IEEE 31st VLSI Test Symposium (VTS) (01.04.2013)
Published in 2013 IEEE 31st VLSI Test Symposium (VTS) (01.04.2013)
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Conference Proceeding
On using address scrambling to implement defect tolerance in SRAMs
Fonseca, R. A., Dilillo, L., Bosio, A., Girard, P., Pravossoudovitch, S., Virazel, A., Badereddine, N.
Published in 2011 IEEE International Test Conference (01.09.2011)
Published in 2011 IEEE International Test Conference (01.09.2011)
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Conference Proceeding
Test solution for data retention faults in low-power SRAMs
Zordan, L. B., Bosio, A., Dilillo, L., Girard, P., Todri, A., Virazel, A., Badereddine, N.
Published in 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01.03.2013)
Published in 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01.03.2013)
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Conference Proceeding
Failure Analysis and Test Solutions for Low-Power SRAMs
Zordan, L. B., Bosio, A., Dilillo, L., Girard, P., Pravossoudovitch, S., Todri, A., Virazel, A., Badereddine, N.
Published in 2011 Asian Test Symposium (01.11.2011)
Published in 2011 Asian Test Symposium (01.11.2011)
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Conference Proceeding
Power-Aware Test Data Compression for Embedded IP Cores
Badereddine, N., Wang, Z., Girard, P., Chakrabarty, K., Virazel, A., Pravossoudovitch, S., Landrault, C.
Published in 2006 15th Asian Test Symposium (01.11.2006)
Published in 2006 15th Asian Test Symposium (01.11.2006)
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Conference Proceeding
Test solution for data retention faults in low-power SRAMs
Zordan, L. B., Bosio, A., Dilillo, L., Girard, P., Todri, A., Virazel, A., Badereddine, N.
Published in Proceedings of the Conference on Design, Automation and Test in Europe (18.03.2013)
Published in Proceedings of the Conference on Design, Automation and Test in Europe (18.03.2013)
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Conference Proceeding
A 40nm low power SRAM retention circuit with PVT-aware self-refreshing virtual VDD regulation
Dray, C, Badereddine, N, Chanussot, C
Published in 2010 IEEE International Memory Workshop (01.05.2010)
Published in 2010 IEEE International Memory Workshop (01.05.2010)
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Conference Proceeding
Analyzing the effect of concurrent variability in the core cells and sense amplifiers on SRAM read access failures
Vatajelu, E. I., Bosio, A., Dilillo, L., Girard, P., Todri, A., Virazel, A., Badereddine, N.
Published in 2013 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) (01.03.2013)
Published in 2013 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) (01.03.2013)
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Conference Proceeding
Analyzing resistive-open defects in SRAM core-cell under the effect of process variability
Vatajelu, Elena I., Bosio, A., Dilillo, L., Girard, P., Todri, A., Virazel, A., Badereddine, N.
Published in 2013 18th IEEE European Test Symposium (ETS) (01.05.2013)
Published in 2013 18th IEEE European Test Symposium (ETS) (01.05.2013)
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Conference Proceeding