Effect of Curing Stress and Period on the Mechanical Properties of Cement-Mixed Sand
Rabbi, Abu Taher Md Zillur, Kuwano, Jiro, Deng, Jianliang, Boon, Tay Wee
Published in SOILS AND FOUNDATIONS (01.08.2011)
Published in SOILS AND FOUNDATIONS (01.08.2011)
Get full text
Journal Article
Conference Proceeding
Effect of Lead Frame and Mold Tool Dimension and Tolerance on Lead Burr in Cavity Encapsulation
Regua, Clemen Jose Abrena, Chee, Lee Chai, Chiew, Chong Chee, Boon, Tay Wee
Published in 2018 IEEE 38th International Electronics Manufacturing Technology Conference (IEMT) (01.09.2018)
Published in 2018 IEEE 38th International Electronics Manufacturing Technology Conference (IEMT) (01.09.2018)
Get full text
Conference Proceeding
Semiconductor Packages and Methods for Manufacturing Thereof
Piller, Andreas, Calo, Paul Armand, Goa, Joo Ming, Bemmerl, Thomas, Macheiner, Stefan, Tay, Wee Boon, Dinkel, Markus, Myers, Edward
Year of Publication 30.03.2023
Get full text
Year of Publication 30.03.2023
Patent
Topside-cooled semiconductor package with molded standoff
Chong, Chee Chiew, Lim, Wee Aun Jason, Chen, Liu, Tay, Wee Boon, Myers, Edward
Year of Publication 01.02.2022
Get full text
Year of Publication 01.02.2022
Patent
TOPSIDE-COOLED SEMICONDUCTOR PACKAGE WITH MOLDED STANDOFF
MYERS, Edward, CHONG, Chee Chiew, TAY, Wee Boon, LIM, Wee Aun Jason, CHEN, Liu
Year of Publication 23.12.2021
Get full text
Year of Publication 23.12.2021
Patent
Halbleitergehäuse und Verfahren zu deren Herstellung
Piller, Andreas, Goa, Joo Ming, Macheiner, Stefan, Bemmerl, Thomas, Calo, Paul Armand Asentista, Dinkel, Markus, Tay, Wee Boon, Myers, Edward
Year of Publication 30.03.2023
Get full text
Year of Publication 30.03.2023
Patent
Semiconductor chip package having contact pins at short side edges
Corocotchia, Raynold Talavera, Chong, Chooi Mei, Schiess, Klaus, Murugan, Sanjay Kumar, Tay, Wee Boon, Otremba, Ralf, Lee, Teck Sim, Tan, Chee Voon
Year of Publication 31.07.2018
Get full text
Year of Publication 31.07.2018
Patent
VERKAPSELTES, ANSCHLUSSLEITERLOSES PACKAGE MIT ZUMINDEST TEILWEISE FREILIEGENDER INNENSEITENWAND EINES CHIPTRÄGERS, ELEKTRONISCHE VORRICHTUNG, VERFAHREN ZUM HERSTELLEN EINES ANSCHLUSSLEITERLOSEN PACKAGES UND VERFAHREN ZUM HERSTELLEN EINER ELEKTRONISCHEN VORRICHTUNG
Liebl, Christoph, Tay, Bun Kian, Bemmerl, Thomas, Chan, Kuok Wai, Tay, Wee Boon, Yong, Wae Chet
Year of Publication 29.04.2021
Get full text
Year of Publication 29.04.2021
Patent