Within-Die Gate Delay Variability Measurement Using Reconfigurable Ring Oscillator
Das, B.P., Amrutur, B., Jamadagni, H.S., Arvind, N.V., Visvanathan, V.
Published in IEEE transactions on semiconductor manufacturing (01.05.2009)
Published in IEEE transactions on semiconductor manufacturing (01.05.2009)
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Journal Article
Voltage and Temperature-Aware SSTA Using Neural Network Delay Model
Das, B. P., Amrutur, B., Jamadagni, H. S., Arvind, N. V., Visvanathan, V.
Published in IEEE transactions on semiconductor manufacturing (01.11.2011)
Published in IEEE transactions on semiconductor manufacturing (01.11.2011)
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Journal Article
A case study of ir-drop in structured at-speed testing
Saxena, J., Butler, K.M., Jayaram, V.B., Kundu, S., Arvind, N.V., Sreeprakash, P., Hachinger, M.
Published in International Test Conference, 2003. Proceedings. ITC 2003 (2003)
Published in International Test Conference, 2003. Proceedings. ITC 2003 (2003)
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Conference Proceeding
Within-die gate delay variability measurement using re-configurable ring oscillator
Das, B.P., Amrutur, B., Jamadagni, H.S., Arvind, N.V., Visvanathan, V.
Published in 2008 IEEE Custom Integrated Circuits Conference (01.09.2008)
Published in 2008 IEEE Custom Integrated Circuits Conference (01.09.2008)
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Conference Proceeding
An Approach to Measure the Performance Impact of Dynamic Voltage Fluctuations Using Static Timing Analysis
Vishweshwara, Ramamurthy, Venkatraman, Ramakrishnan, Udayakumar, H., Arvind, N.V.
Published in 2009 22nd International Conference on VLSI Design (01.01.2009)
Published in 2009 22nd International Conference on VLSI Design (01.01.2009)
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Conference Proceeding
Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations
Das, B.P., Janakiraman, V., Amrutur, B., Jamadagni, H.S., Arvind, N.V.
Published in 21st International Conference on VLSI Design (VLSID 2008) (01.01.2008)
Published in 21st International Conference on VLSI Design (VLSID 2008) (01.01.2008)
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Conference Proceeding
A comprehensive solution for true hierarchical timing and crosstalk delay signoff
Rajagopal, K.A., Sivakumar, R., Arvind, N.V., Sreeram, C., Visvanathan, V., Dhuri, S., Chander, R., Fortner, P., Sripada, S., Qiuyang Wu
Published in 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) (2006)
Published in 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) (2006)
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Conference Proceeding
Improved approach for noise propagation to identify functional noise violations
Shrivastava, S., Varghese, D., Narang, V., Arvind, N.V.
Published in 17th International Conference on VLSI Design. Proceedings (2004)
Published in 17th International Conference on VLSI Design. Proceedings (2004)
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Conference Proceeding
Path based approach for crosstalk delay analysis
Arvind, N.V., Rajagopal, K.A., Ajith, H.S., Das, S.
Published in 17th International Conference on VLSI Design. Proceedings (2004)
Published in 17th International Conference on VLSI Design. Proceedings (2004)
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Conference Proceeding
Integrated crosstalk and oxide integrity analysis in DSM designs
Arviad, N.V., Suresh, P.R., Sivakumar, V., Pal, C., Das, D.
Published in VLSI Design 2001. Fourteenth International Conference on VLSI Design (2001)
Published in VLSI Design 2001. Fourteenth International Conference on VLSI Design (2001)
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Conference Proceeding