Development of micro bump joints fabrication process using cone shape Au bumps for 3D LSI chip stacking
Imura, Fumito, Watanabe, Naoya, Nemoto, Shunsuke, Wei Feng, Kikuchi, Katsuya, Nakagawa, Hiroshi, Aoyagi, Masashiro
Published in 2014 IEEE 64th Electronic Components and Technology Conference (ECTC) (01.05.2014)
Published in 2014 IEEE 64th Electronic Components and Technology Conference (ECTC) (01.05.2014)
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Conference Proceeding
Wide bus chip-to-chip interconnection technology using fine pitch bump joint array for 3D LSI chip stacking
Aoyagi, M., Imura, F., Nemoto, S., Watanabe, N., Kato, F., Kikuchi, K., Nakagawa, H., Hagimoto, M., Uchida, H., Matsumoto, Y.
Published in 2012 2nd IEEE CPMT Symposium Japan (01.12.2012)
Published in 2012 2nd IEEE CPMT Symposium Japan (01.12.2012)
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Conference Proceeding
Transient response characteristics of through silicon via in high resistivity silicon interposer
Watanabe, N., Ueda, C., Fujii, F., Akiyama, Y., Kikuchi, K., Kitamura, Y., Gomyo, T., Ookubo, T., Koyama, T., Kamada, T., Aoyagi, M., Otsuka, K.
Published in 2012 2nd IEEE CPMT Symposium Japan (01.12.2012)
Published in 2012 2nd IEEE CPMT Symposium Japan (01.12.2012)
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