Search Results - "Aiwu Ruan" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

A Routability-Aware Algorithm for Both Global and Local Interconnect Resource Test and Diagnosis of Xilinx SRAM-FPGAs

A Routability-Aware Algorithm for Both Global and Local Interconnect Resource Test and Diagnosis of Xilinx SRAM-FPGAs

by Ruan, Aiwu, Huang, Haiyang, Wang, Jingwu, Zhao, Yifan
Published in Journal of electronic testing (01.12.2016)

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Journal Article

Insight Into a Generic Interconnect Resource Model for Xilinx Virtex and Spartan Series FPGAs

Insight Into a Generic Interconnect Resource Model for Xilinx Virtex and Spartan Series FPGAs

by Ruan, A, Yang, J, Wan, L, Jie, B, Tian, Z
Published in IEEE transactions on circuits and systems. II, Express briefs (01.11.2013)

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Journal Article

A Built-In Self-Test (BIST) system with non-intrusive TPG and ORA for FPGA test and diagnosis

A Built-In Self-Test (BIST) system with non-intrusive TPG and ORA for FPGA test and diagnosis

by Ruan, Aiwu, Kang, Shi, Wang, Yu, Han, Xiao, Zhu, Zujian, Liao, Yongbo, Li, Peng
Published in Microelectronics and reliability (01.03.2013)

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Journal Article

A bitstream readback-based automatic functional test and diagnosis method for Xilinx FPGAs

A bitstream readback-based automatic functional test and diagnosis method for Xilinx FPGAs

by Ruan, Aiwu, Jie, Bairui, Wan, Li, Yang, Junhao, Xiang, Chuanyin, Zhu, Zujian, Wang, Yu
Published in Microelectronics and reliability (01.08.2014)

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Journal Article

Graph theory for FPGA minimum configurations

Graph theory for FPGA minimum configurations

by 阮爱武李文昌项传银宋江民康实廖永波
Published in Journal of semiconductors (01.11.2011)

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Journal Article

A new event driven testbench synthesis engine for FPGA emulation

A new event driven testbench synthesis engine for FPGA emulation

by Haocheng Huang, Aiwu Ruan, Yongbo Liao, Jianhua Zhu, Lin Wang, Chuanyin Xiang, Pin Li
Published in 2011 9th IEEE International Conference on ASIC (01.10.2011)

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Conference Proceeding

A Reinforcement Learning-Based Markov-Decision Process (MDP) Implementation for SRAM FPGAs

A Reinforcement Learning-Based Markov-Decision Process (MDP) Implementation for SRAM FPGAs

by Ruan, Aiwu, Shi, Aokai, Qin, Liang, Xu, Shiyang, Zhao, Yifan
Published in IEEE transactions on circuits and systems. II, Express briefs (01.10.2020)

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Journal Article

Interconnect resources testing and faults diagnosis in field programmable gate arrays

Interconnect resources testing and faults diagnosis in field programmable gate arrays

by Liao Yongbo, Ruan Aiwu, Wang Yu, Xiang Chuanyin, Wang Lin, Huang Haocheng, Zhu Jianhua
Published in IEEE 2011 10th International Conference on Electronic Measurement & Instruments (01.08.2011)

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Conference Proceeding

Deep reinforcement learning acceleration method for multi-core processor-single graphics processor

Deep reinforcement learning acceleration method for multi-core processor-single graphics processor

by ZHU CHONGYANG, RUAN AIWU
Year of Publication 30.04.2021

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Patent

Data exception sensing method based on heterogeneous system

Data exception sensing method based on heterogeneous system

by XIANG LIN, RUAN AIWU
Year of Publication 02.03.2021

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Patent

Deep reinforcement learning method based on multiple threads

Deep reinforcement learning method based on multiple threads

by FAN YINGBAO, WANG XIAO, RUAN AIWU
Year of Publication 18.07.2023

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Patent

Neural network reasoning FPGA rapid deployment method

Neural network reasoning FPGA rapid deployment method

by WANG XIAO, WANG YONGQING, RUAN AIWU
Year of Publication 13.06.2023

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Patent

Convolutional neural network acceleration method and convolutional neural network accelerator

Convolutional neural network acceleration method and convolutional neural network accelerator

by WANG XIAO, LI KE, RUAN AIWU
Year of Publication 25.06.2024

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Patent

Field programmable gate array (FPGA) interconnection resource test algorithm based on graph reinforcement learning

Field programmable gate array (FPGA) interconnection resource test algorithm based on graph reinforcement learning

by FAN YINGBAO, YANG SHENGJIANG, RUAN AIWU
Year of Publication 19.04.2022

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Patent

Hardware Trojan horse detection optimization technology based on ring oscillator

Hardware Trojan horse detection optimization technology based on ring oscillator

by ZHANG ZHAOZHAO, WANG ZIWEN, RUAN AIWU
Year of Publication 12.03.2021

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Patent

SENSING APPARATUS, SYSTEM AND METHOD

SENSING APPARATUS, SYSTEM AND METHOD

by RUAN AIWU
Year of Publication 28.07.2005

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Patent

Partial bit stream read-back technology for testing internal resources of an FPGA

Partial bit stream read-back technology for testing internal resources of an FPGA

by YANG SHENGJIANG, RUAN AIWU, DU PENG
Year of Publication 23.04.2021

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Patent

Fine-grained self-repairing circuit and method for FPGA (Field Programmable Gate Array)

Fine-grained self-repairing circuit and method for FPGA (Field Programmable Gate Array)

by LI WEI, LI JIANJUN, LI GUIHONG, WANG ZUO, RUAN AIWU
Year of Publication 24.06.2022

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Patent

In-memory computing circuit and method based on non-volatile memory device

In-memory computing circuit and method based on non-volatile memory device

by LI WEI, DU TAO, YIN ZIQIANG, RUAN AIWU, WU FANGMING
Year of Publication 14.06.2022

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Patent

Heterogeneous neural network calculation accelerator design method based on FPGA

Heterogeneous neural network calculation accelerator design method based on FPGA

by LI PEIRUI, RUAN AIWU, DU PENG
Year of Publication 10.04.2020

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Patent