Search Results - "ATUL KALAMBUR" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

Efficient CPU mailbox read access to GPU memory

Efficient CPU mailbox read access to GPU memory

by Kalambur Atul, Ma Dennis K, Tian Lei, Diard Franck R, Gupta Karan, Jain Praveen, Huang Wei-Je
Year of Publication 08.08.2017

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Patent

Reduced verification complexity and power saving features in a pipelined integrated circuit

Reduced verification complexity and power saving features in a pipelined integrated circuit

by Kalambur, Atul, Wong, Michelle
Year of Publication 11.10.2005

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Patent

Reduced verification complexity and power saving features in a pipelined integrated circuit

Reduced verification complexity and power saving features in a pipelined integrated circuit

by WONG MICHELLE, KALAMBUR ATUL
Year of Publication 11.10.2005

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Patent

REDUCED VERIFICATION COMPLEXITY AND POWER SAVING FEATURES IN A PIPELINED INTEGRATED CIRCUIT

REDUCED VERIFICATION COMPLEXITY AND POWER SAVING FEATURES IN A PIPELINED INTEGRATED CIRCUIT

by WONG, MICHELLE, KALAMBUR, ATUL
Year of Publication 05.08.2004

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Patent

REDUCED VERIFICATION COMPLEXITY AND POWER SAVING FEATURES IN A PIPELINED INTEGRATED CIRCUIT

REDUCED VERIFICATION COMPLEXITY AND POWER SAVING FEATURES IN A PIPELINED INTEGRATED CIRCUIT

by WONG, MICHELLE, KALAMBUR, ATUL
Year of Publication 24.12.2003

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Patent

Reduced verification complexity and power saving features in a pipelined integated circuit

Reduced verification complexity and power saving features in a pipelined integated circuit

by WONG MICHELLE, KALAMBUR ATUL
Year of Publication 18.12.2003

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Patent

Reduced verification complexity and power saving features in a pipelined integated circuit

Reduced verification complexity and power saving features in a pipelined integated circuit

by Kalambur, Atul, Wong, Michelle
Year of Publication 18.12.2003

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Patent

SRT divider having several bits of each partial remainder one-hot encoded to minimize the logic levels needed to estimate quotient bits

SRT divider having several bits of each partial remainder one-hot encoded to minimize the logic levels needed to estimate quotient bits

by Kalambur, Atul, Gopaladhine, Srinivasa
Year of Publication 15.04.2003

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Patent

SRT divider having several bits of each partial remainder one-hot encoded to minimize the logic levels needed to estimate quotient bits

SRT divider having several bits of each partial remainder one-hot encoded to minimize the logic levels needed to estimate quotient bits

by KALAMBUR ATUL, GOPALADHINE SRINIVASA
Year of Publication 15.04.2003

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Patent

Deadlock Avoidance By Marking CPU Traffic As Special

Deadlock Avoidance By Marking CPU Traffic As Special

by MARCHAND PATRICK R, MA DENNIS K, GLASCO DAVID B, DUNCAN SAMUEL H, HUANG WEI-JE, KALAMBUR ATUL
Year of Publication 03.02.2016

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Patent

EFFICIENT CPU MAILBOX READ ACCESS TO GPU MEMORY

EFFICIENT CPU MAILBOX READ ACCESS TO GPU MEMORY

by JAIN PRAVEEN, DIARD FRANCK R, TIAN LEI, MA DENNIS K, GUPTA KARAN, HUANG WEI-JE, KALAMBUR ATUL
Year of Publication 20.03.2014

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Patent

Deadlock avoidance by marking CPU traffic as special

Deadlock avoidance by marking CPU traffic as special

by MARCHAND PATRICK R, MA DENNIS K, GLASCO DAVID B, DUNCAN SAMUEL H, HUANG WEI-JE, KALAMBUR ATUL
Year of Publication 05.03.2013

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Patent

Deadlock avoidance by using multiple virtual channels of a bus

Deadlock avoidance by using multiple virtual channels of a bus

by DENNIS K MA, DAVID B GLASCO, SAMUEL H DUNCAN, PATRICK R MARCHAND, WEI-JE HUANG, ATUL KALAMBUR
Year of Publication 30.03.2011

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Patent

Storing results of producer instructions to facilitate consumer instruction dependency tracking

Storing results of producer instructions to facilitate consumer instruction dependency tracking

by KADAMBI SUDARSHAN, PRABHU JULIAN A, STARAITIS JULIE M, LIEBHOLZ DANIEL L, KALAMBUR ATUL
Year of Publication 26.06.2007

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Patent

Storing results of producer instructions to facilitate consumer instruction dependency tracking

Storing results of producer instructions to facilitate consumer instruction dependency tracking

by Prabhu, Julian A, Kalambur, Atul, Kadambi, Sudarshan, Liebholz, Daniel L, Staraitis, Julie M
Year of Publication 26.06.2007

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Patent

DEADLOCK AVOIDANCE BY MARKING CPU TRAFFIC AS SPECIAL

DEADLOCK AVOIDANCE BY MARKING CPU TRAFFIC AS SPECIAL

by MARCHAND PATRICK R, MA DENNIS K, GLASCO DAVID B, DUNCAN SAMUEL H, HUANG WEI-JE, KALAMBUR ATUL
Year of Publication 24.06.2010

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Patent

Deadlock Avoidance By Marking CPU Traffic As Special

Deadlock Avoidance By Marking CPU Traffic As Special

by MARCHAND PATRICK R, MA DENNIS K, GLASCO DAVID B, DUNCAN SAMUEL H, HUANG WEI-JE, KALAMBUR ATUL
Year of Publication 17.06.2010

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Patent

Using a separate virtual channel on a PCI Express bus for a read request which is generated while processing another request

Using a separate virtual channel on a PCI Express bus for a read request which is generated while processing another request

by DENNIS K MA, DAVID B GLASCO, SAMUEL H DUNCAN, PATRICK R MARCHAND, WEI-JE HUANG, ATUL KALAMBUR
Year of Publication 16.06.2010

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Patent

An extended addressing mode for low power

An extended addressing mode for low power

by Kalambur, A., Irwin, M.J.
Published in International Symposium on Low Power Electronics and Design: Proceedings of the 1997 international symposium on Low power electronics and design; 18-20 Aug. 1997 (1997)

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Conference Proceeding

Computersystem und Verfahren geeignet zum Vermeiden von Datenkommunikationsverklemmungssituationen durch Markieren von CPU-Datenverkehr als speziell

Computersystem und Verfahren geeignet zum Vermeiden von Datenkommunikationsverklemmungssituationen durch Markieren von CPU-Datenverkehr als speziell

by DUNCAN, SAMUEL H, MA, DENNIS K, GLASCO, DAVID B, HUANG, WEI-JE, KALAMBUR, ATUL, MARCHAND, PATRICK R
Year of Publication 03.07.2014

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Patent