Sub-threshold latch-based icyflex2 32-bit processor with wide supply range operation
Pons, Marc, Le, Thanh-Chau, Arm, Claude, Severac, Daniel, Nagel, Jean-Luc, Morgan, Marc, Emery, Stephane
Published in ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference (01.09.2016)
Published in ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference (01.09.2016)
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Conference Proceeding
Sub-threshold latch-based icyflex2 32-bit processor with wide supply range operation
Pons, Marc, Thanh-Chau Le, Arm, Claude, Severac, Daniel, Nagel, Jean-Luc, Morgan, Marc, Emery, Stephane
Published in 2016 46th European Solid-State Device Research Conference (ESSDERC) (01.09.2016)
Published in 2016 46th European Solid-State Device Research Conference (ESSDERC) (01.09.2016)
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Conference Proceeding
Low-Power 32-bit Dual-MAC 120 $\mu$W/MHz 1.0 V icyflex1 DSP/MCU Core
Arm, C, Gyger, S, Masgonty, J-M, Morgan, M, Nagel, J-L, Piguet, C, Rampogna, F, Volet, P
Published in IEEE journal of solid-state circuits (01.07.2009)
Published in IEEE journal of solid-state circuits (01.07.2009)
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Journal Article
Low-Power 32-bit Dual-MAC 120 μW/MHz 1.0 V icyflex1 DSP/MCU Core: Special Issue on the 34TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE (ESSCIRC)
ARM, Claude, GYGER, Stève, MASGONTY, Jean-Marc, MORGAN, Marc, NAGEL, Jean-Luc, PIGUET, Christian, RAMPOGNA, Flavio, VOLET, Patrick
Published in IEEE journal of solid-state circuits (2009)
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Published in IEEE journal of solid-state circuits (2009)
Journal Article
A 1V RF SoC with an 863-to-928MHz 400kb/s radio and a 32b Dual-MAC DSP core for Wireless Sensor and Body Networks
Le Roux, E., Scolari, N., Banerjee, B., Arm, C., Volet, P., Sigg, D., Heim, P., Perotto, J.-F., Kaess, F., Raemy, N., Vouilloz, A., Ruffieux, D., Contaldo, M., Giroud, F., Severac, D., Morgan, M., Gyger, S., Monneron, C., Thanh-Chau Le, Henzelin, C., Peiris, V.
Published in 2010 IEEE International Solid-State Circuits Conference - (ISSCC) (01.02.2010)
Published in 2010 IEEE International Solid-State Circuits Conference - (ISSCC) (01.02.2010)
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Conference Proceeding
An SoC combining a 132dB QVGA pixel array and a 32b DSP/MCU processor for vision applications
Ruedi, P.-F., Heim, P., Gyger, S., Kaess, F., Arm, C., Caseiro, R., Nagel, J.-L., Todeschini, S.
Published in 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers (01.02.2009)
Published in 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers (01.02.2009)
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Conference Proceeding
Low-power design of 8-b embedded CoolRisc microcontroller cores
Piguet, C., Masgonty, J.-M., Arm, C., Durand, S., Schneider, T., Rampogna, F., Scarnera, C., Iseli, C., Bardyn, J.-P., Pache, R., Dijkstra, E.
Published in IEEE journal of solid-state circuits (01.07.1997)
Published in IEEE journal of solid-state circuits (01.07.1997)
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Journal Article
A 10 kgates sub-threshold stream cipher in 180 nm with 6.1 kHz frequency 70 nA total current and 46 nA leakage at 0.33 V
Pons, Marc, Le, Thanh-Chau, Arm, Claude, Severac, Daniel, Emery, Stephane, Piguet, Christian
Published in 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) (01.10.2015)
Published in 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) (01.10.2015)
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Conference Proceeding
A 1kb single-side read 6T sub-threshold SRAM in 180 nm with 530 Hz frequency 3.1 nA total current and 2.4 nA leakage at 0.27 V
Pons, Marc, Thanh-Chau Le, Arm, Claude, Severac, Daniel, Emery, Stephane, Piguet, Christian
Published in 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) (01.10.2015)
Published in 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) (01.10.2015)
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Conference Proceeding