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A 12.1 fJ/Conv.-Step 12b 140 MS/s 28-nm CMOS Pipelined SAR ADC Based on Energy-Efficient Switching and Shared Ring Amplifier

by Park, Jun-Sang, An, Tai-Ji, Ahn, Gil-Cho, Lee, Seung-Hoon
Published in IEEE transactions on circuits and systems. II, Express briefs (01.07.2019)

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Area-Efficient Time-Shared Digital-to-Analog Converter With Dual Sampling for AMOLED Column Driver IC's

by An, Tai-Ji, Hwang, Moon-Sang, Choe, Won-Jun, Ahn, Gil-Cho, Lee, Seung-Hoon
Published in IEEE transactions on circuits and systems. I, Regular papers (01.10.2018)

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An 11-bit 160-MS/s Non-binary C-based SAR ADC with a Partially Monotonic Switching Scheme

by Lee, Jae-Hyuk, Lee, Seung-Hoon, Boo, Jun-Ho, Park, Jun-Sang, An, Tai-Ji, Shin, Hee-Wook, Cho, Young-Jae, Choi, Michael, Burm, Jin-Wook, Ahn, Gil-Cho
Published in Journal of semiconductor technology and science (01.04.2023)

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High-efficiency low-noise pulse-width modulation DC–DC buck converter based on multi-partition switching for mobile system-on-a-chip applications

by An, Tai-Ji, Ahn, Gil-Cho, Lee, Seung-Hoon
Published in IET power electronics (09.03.2016)

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$Time-Interleaved and Circuit-Shared Dual-Channel 10 b 200 MS/s 0.18 \mu CMOS Analog-to-Digital Convertor$

Time-Interleaved and Circuit-Shared Dual-Channel 10 b 200 MS/s 0.18 \mu CMOS Analog-to-Digital Convertor

by Kim, Hyo-Jin, An, Tai-Ji, Myung, Sung-Meen, Lee, Seung-Hoon
Published in IEEE transactions on very large scale integration (VLSI) systems (01.12.2013)

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A 12-bit 180 MS/s Current-steering DAC with Cascaded Local-element Matching Topologies

by Park, Jun-Sang, An, Tai-Ji, Choi, Hee-Cheol, Ahn, Gil-Cho, Lee, Seung-Hoon
Published in Journal of semiconductor technology and science (01.02.2020)

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Area-efficient Ramp Signal-based Column Driving Technique for AMOLED Panels

by An, Tai-Ji, Hwang, Moon-Sang, Choe, Won-Jun, Park, Jun-Sang, Ahn, Gil-Cho, Lee, Seung-Hoon
Published in Journal of semiconductor technology and science (01.08.2019)

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Range-Scaled 14b 30 MS/s Pipeline-SAR Composite ADC for High-Performance CMOS Image Sensors

by Park, Jun-Sang, Jeong, Jong-Min, An, Tai-Ji, Ahn, Gil-Cho, Lee, Seung-Hoon
Published in Journal of semiconductor technology and science (01.02.2016)

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A Two-channel 10b 160 MS/s 28 nm CMOS Asynchronous Pipelined-SAR ADC with Low Channel Mismatch

by An, Tai-ji, Cho, Young-Sea, Park, Jun-Sang, Ahn, Gil-Cho, Lee, Seung-Hoon
Published in Journal of semiconductor technology and science (2017)

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Range-Scaled 14b 30 MS/s Pipeline-SAR Composite ADC for High-Performance CMOS Image Sensors

by Park, Jun-Sang, Jeong, Jong-Min, An, Tai-Ji, Ahn, Gil-Cho, Lee, Seung-Hoon
Published in Journal of semiconductor technology and science (2016)

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A 12b 100 MS/s Three-Step Hybrid Pipeline ADC Based on Time-Interleaved SAR ADCs

by Park, Jun-Sang, An, Tai-Ji, Cho, Suk-Hee, Kim, Yong-Min, Ahn, Gil-Cho, Roh, Ji-Hyun, Lee, Mun-Kyo, Nah, Sun-Phil, Lee, Seung-Hoon
Published in Journal of semiconductor technology and science (01.04.2014)

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A 70 dB SNDR 10 MS/s 28 nm CMOS Nyquist SAR ADC with Capacitor Mismatch Calibration Reusing Segmented Reference Voltages

by Kim, Ho-Jin, Lee, Seung-Hoon, Boo, Jun-Ho, Lee, Jae-Hyuk, Park, Jun-Sang, An, Tai-Ji, Do, Sung-Han, Cho, Young-Jae, Choi, Michael, Ahn, Gil-Cho
Published in Journal of semiconductor technology and science (01.12.2021)

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A 12b 100 MS/s Three-Step Hybrid Pipeline ADC Based on Time-Interleaved SAR ADCs

by Park, Jun-Sang, An, Tai-Ji, Cho, Suk-Hee, Kim, Yong-Min, Ahn, Gil-Cho, Roh, Ji-Hyun, Lee, Mun-Kyo, Nah, Sun-Phil, Lee, Seung-Hoon
Published in Journal of semiconductor technology and science (2014)

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A Range-Scaled 13b 100 MS/s 0.13 um CMOS SHA-Free ADC Based on a Single Reference

by Hwang, Dong-Hyun, Song, Jung-Eun, Nam, Sang-Pil, Kim, Hyo-Jin, An, Tai-Ji, Kim, Kwang-Soo, Lee, Seung-Hoon
Published in Journal of semiconductor technology and science (2013)

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A Two-channel 10b 160 MS/s 28 nm CMOS Asynchronous Pipelined-SAR ADC with Low Channel Mismatch

by An, Tai-ji, Cho, Young-Sea, Park, Jun-Sang, Ahn, Gil-Cho, Lee, Seung-Hoon
Published in Journal of semiconductor technology and science (01.10.2017)

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A mismatch-error minimized four-channel time-interleaved 11 b 150 MS/s pipelined SAR ADC

by Park, Hye-Lim, Choi, Min-Ho, Nam, Sang-Pil, An, Tai-Ji, Lee, Seung-Hoon
Published in Analog integrated circuits and signal processing (01.07.2013)

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A 0.16mm2 12b 30MS/s 0.18μm CMOS SAR ADC based on low-power composite switching

by Jong-Min Jeong, Tai-Ji An, Hee-Wook Shin, Gi-Wook Lee, Seung-Hoon Lee
Published in 2015 International SoC Design Conference (ISOCC) (01.11.2015)

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A Range-Scaled 13b 100 MS/s 0.13 um CMOS SHA-Free ADC Based on a Single Reference

by Hwang, Dong-Hyun, Song, Jung-Eun, Nam, Sang-Pil, Kim, Hyo-Jin, An, Tai-Ji, Kim, Kwang-Soo, Lee, Seung-Hoon
Published in Journal of semiconductor technology and science (01.04.2013)

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Time-Interleaved and Circuit-Shared Dual-Channel 10 b 200 MS/s 0.18 μm CMOS Analog-to-Digital Convertor

by KIM, Hyo-Jin, AN, Tai-Ji, MYUNG, Sung-Meen, LEE, Seung-Hoon
Published in IEEE transactions on very large scale integration (VLSI) systems (01.12.2013)

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A 10b 1MS/s-to-10MS/s 0.11um CMOS SAR ADC for analog TV applications

by Sang-Pil Nam, Yong-Min Kim, Dong-Hyun Hwang, Hyo-Jin Kim, Tai-Ji An, Jun-Sang Park, Suk-Hee Cho, Gil-Cho Ahn, Seung-Hoon Lee
Published in 2012 International SoC Design Conference (ISOCC) (01.11.2012)

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