Low-Cost Inter-Linked Subarrays (LISA): Enabling fast inter-subarray data movement in DRAM
Chang, Kevin K., Nair, Prashant J., Donghyuk Lee, Ghose, Saugata, Qureshi, Moinuddin K., Mutlu, Onur
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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A large-scale study of soft-errors on GPUs in the field
Bin Nie, Tiwari, Devesh, Gupta, Saurabh, Smirni, Evgenia, Rogers, James H.
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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Memristive Boltzmann machine: A hardware accelerator for combinatorial optimization and deep learning
Bojnordi, Mahdi Nazm, Ipek, Engin
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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ChargeCache: Reducing DRAM latency by exploiting row access locality
Hassan, Hasan, Pekhimenko, Gennady, Vijaykumar, Nandita, Seshadri, Vivek, Lee, Donghyuk, Ergin, Oguz, Mutlu, Onur
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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TABLA: A unified template-based framework for accelerating statistical machine learning
Mahajan, Divya, Park, Jongse, Amaro, Emmanuel, Sharma, Hardik, Yazdanbakhsh, Amir, Joon Kyung Kim, Esmaeilzadeh, Hadi
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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Mobile CPU's rise to power: Quantifying the impact of generational mobile CPU design trends on performance, energy, and user satisfaction
Halpern, Matthew, Yuhao Zhu, Reddi, Vijay Janapa
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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HRL: Efficient and flexible reconfigurable logic for near-data processing
Mingyu Gao, Kozyrakis, Christos
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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Best-offset hardware prefetching
Michaud, Pierre
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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Cache QoS: From concept to reality in the Intel® Xeon® processor E5-2600 v3 product family
Herdrich, Andrew, Verplanke, Edwin, Autee, Priya, Illikkal, Ramesh, Gianos, Chris, Singhal, Ronak, Iyer, Ravi
Published in 2016 IEEE International Symposium on High Performance Computer Architecture (HPCA) (01.03.2016)
Published in 2016 IEEE International Symposium on High Performance Computer Architecture (HPCA) (01.03.2016)
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A complete key recovery timing attack on a GPU
Zhen Hang Jiang, Yunsi Fei, Kaeli, David
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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Towards high performance paged memory for GPUs
Tianhao Zheng, Nellans, David, Zulfiqar, Arslan, Stephenson, Mark, Keckler, Stephen W.
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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A performance analysis framework for optimizing OpenCL applications on FPGAs
Wang, Zeke, He, Bingsheng, Zhang, Wei, Jiang, Shunning
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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CATalyst: Defeating last-level cache side channel attacks in cloud computing
Fangfei Liu, Qian Ge, Yarom, Yuval, Mckeen, Frank, Rozas, Carlos, Heiser, Gernot, Lee, Ruby B.
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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Restore truncation for performance improvement in future DRAM systems
Xianwei Zhang, Youtao Zhang, Childers, Bruce R., Jun Yang
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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CompEx: Compression-expansion coding for energy, latency, and lifetime improvements in MLC/TLC NVM
Palangappa, Poovaiah M., Mohanram, Kartik
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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Warped-preexecution: A GPU pre-execution approach for improving latency hiding
Sangpil Lee, Won Woo Ro, Keunsoo Kim, Gunjae Koo, Myung Kuk Yoon, Annavaram, Murali
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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A case for toggle-aware compression for GPU systems
Pekhimenko, Gennady, Bolotin, Evgeny, Vijaykumar, Nandita, Mutlu, Onur, Mowry, Todd C., Keckler, Stephen W.
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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Modeling cache performance beyond LRU
Beckmann, Nathan, Sanchez, Daniel
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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Energy-efficient address translation
Karakostas, Vasileios, Gandhi, Jayneel, Cristal, Adrian, Hill, Mark D., McKinley, Kathryn S., Nemirovsky, Mario, Swift, Michael M., Unsal, Osman S.
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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Predicting the memory bandwidth and optimal core allocations for multi-threaded applications on large-scale NUMA machines
Wei Wang, Davidson, Jack W., Soffa, Mary Lou
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
Published in Proceedings - International Symposium on High-Performance Computer Architecture (01.03.2016)
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