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Search Results - "张俊安 李广军 张瑞涛 付东兵 李皎雪 魏亚峰 阎波 刘军 李儒章"
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A 2.5 GS/s 14-bit D/A converter with 8 to 1 MUX
by
张俊安 李广军 张瑞涛 付东兵 李皎雪 魏亚峰 阎波 刘军 李儒章
Published in
Journal of semiconductors
(01.03.2016)
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architecture
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architecture
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bias
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bias circuit
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clocks
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EJS IOP Science
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