Implementation of the Cell Broadband Engine™ in 65 nm SOI Technology Featuring Dual Power Supply SRAM Arrays Supporting 6 GHz at 1.3 V
Pille, J., Adams, C., Christensen, T., Cottier, S.R., Ehrenreich, S., Kono, F., Nelson, D., Takahashi, O., Tokito, S., Torreiter, O., Wagner, O., Wendel, D.
Published in IEEE journal of solid-state circuits (01.01.2008)
Published in IEEE journal of solid-state circuits (01.01.2008)
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Journal Article
Conference Proceeding
A 4R2W register file for a 2.3GHz wire-speed POWER™ processor with double-pumped write operation
Ditlow, G S, Montoye, R K, Storino, S N, Dance, S M, Ehrenreich, S, Fleischer, B M, Fox, T W, Holmes, K M, Mihara, J, Nakamura, Y, Onishi, S, Shearer, R, Wendel, D, Leland Chang
Published in 2011 IEEE International Solid-State Circuits Conference (01.02.2011)
Published in 2011 IEEE International Solid-State Circuits Conference (01.02.2011)
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Conference Proceeding
On-die voltage regulation using p-FET header devices with a feedback control loop
EHRENREICH SEBASTIAN, GLOEKLER TILMAN, SPRUTH BRUNO U, BUECHNER THOMAS
Year of Publication 02.07.2013
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Year of Publication 02.07.2013
Patent