An all-digital delay-locked loop for high-speed memory interface applications
Shih-Lun Chen, Ming-Jing Ho, Yu-Ming Sun, Maung Wai Lin, Jung-Chin Lai
Published in Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test (01.04.2014)
Published in Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test (01.04.2014)
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