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Dynamic random access memory (DRAM) device and memory controller therefor

by Shin, Seung-Jun, Oh, Tae-Young
Year of Publication 05.09.2023

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Dynamic random access memory (DRAM) device and memory controller therefor

by Shin, Seung-Jun, Oh, Tae-Young
Year of Publication 01.08.2023

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Patent

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Clock synchronizing method of a multiple clock domain memory device

by Kim, Hye-Ran, Oh, Tae-Young, Jeon, Seong-Hwan
Year of Publication 06.08.2024

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Semiconductor device and method of operating and controlling a semiconductor device

by Oh, Tae Young, Shin, Seungjun
Year of Publication 07.01.2020

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Patent

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Dynamic random access memory (DRAM) device, memory controller therefor, and memory system

by Shin, Seung-Jun, Oh, Tae-Young
Year of Publication 03.08.2021

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Patent

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Clock synchronizing method of a multiple clock domain memory device

by Kim, Hye-Ran, Oh, Tae-Young, Jeon, Seong-Hwan
Year of Publication 28.03.2023

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Patent

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Synchronous dynamic random access memory (SDRAM) device, memory controller therefor, and method of operating same

by Shin, Seung-Jun, Oh, Tae-Young
Year of Publication 23.02.2021

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Patent

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Clock synchronizing method of a multiple clock domain memory device

by Kim, Hye-Ran, Oh, Tae-Young, Jeon, Seong-Hwan
Year of Publication 22.03.2022

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MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD OF OPERATING THE SAME

by Ha, Kyung-soo, Kim, Si-hong, Kim, Young-hun, Oh, Tae-young
Year of Publication 05.10.2023

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Memory system

by Shin, Seung-Jun, Oh, Tae-Young
Year of Publication 03.03.2020

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Memory device for supporting command bus training mode and method of operating the same

by Ha, Kyung-soo, Kim, Si-hong, Kim, Young-hun, Oh, Tae-young
Year of Publication 01.08.2023

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Patent

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Clock synchronizing method of a multiple clock domain memory device

by Kim, Hye-Ran, Oh, Tae-Young, Jeon, Seong-Hwan
Year of Publication 09.03.2021

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Patent

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Synchronous dynamic random access memory (SDRAM) device, memory controller for same, and method of operating same

by Shin, Seung-Jun, Oh, Tae-Young
Year of Publication 30.10.2018

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Memory device having error correction function and operating method thereof

by Park, Jung-Hwan, Chi, Hyung-Joon, Ha, Kyung-Soo, Oh, Tae-Young, Hwang, Hyong-Ryol
Year of Publication 10.05.2022

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Patent

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Semiconductor memory devices and methods of operating semiconductor memory devices

by Park, Jung-Hwan, Oh, Tae-Young, Cho, Seok-Jin
Year of Publication 07.07.2020

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Patent

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CLOCK SYNCHRONIZING METHOD OF A MULTIPLE CLOCK DOMAIN MEMORY DEVICE

by Kim, Hye-Ran, Oh, Tae-Young, Jeon, Seong-Hwan
Year of Publication 07.05.2020

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Memory device for performing multi-core access to bank groups

by Oh, Tae Young, Song, Ho Sung
Year of Publication 26.06.2018

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Memory device and method for supporting command bus training mode based on one data signal

by Ha, Kyung-soo, Kim, Si-hong, Kim, Young-hun, Oh, Tae-young
Year of Publication 07.12.2021

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Memory device and system supporting command bus training, and operating method thereof

by Kim, Hye-Ran, Oh, Tae-Young
Year of Publication 01.05.2018

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Patent

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Clock synchronizing method of a multiple clock domain memory device

by Kim, Hye-Ran, Oh, Tae-Young, Jeon, Seong-Hwan
Year of Publication 04.02.2020

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Patent

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