Local NOR and global NAND match-line architecture for high performance CAM
Sung-gi Ahn, Kee-won Kwon
Published in 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS) (01.08.2017)
Published in 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS) (01.08.2017)
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Conference Proceeding
Low Power Search Engine using Non-volatile Memory based TCAM with Priority Encoding and Selective Activation of Search Line and Match Line
Cheol Kim, Rak-Joo Sung, Sung-Gi Ahn, Jisu Min, Kee-Won Kwon
Published in 2018 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2018)
Published in 2018 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2018)
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Conference Proceeding
A 16-GB 640-GB/s HBM2E DRAM With a Data-Bus Window Extension Technique and a Synergetic On-Die ECC Scheme
Chun, Ki Chul, Kim, Yong Ki, Ryu, Yesin, Park, Jaewon, Oh, Chi Sung, Byun, Young Yong, Kim, So Young, Shin, Dong Hak, Lee, Jun Gyu, Ho, Byung-Kyu, Park, Min-Sang, Cho, Seong-Jin, Woo, Seunghan, Moon, Byoung Mo, Kil, Beomyong, Ahn, Sungoh, Lee, Jae Hoon, Kim, Soo Young, Choi, Seouk-Kyu, Jeong, Jae-Seung, Ahn, Sung-Gi, Kim, Jihye, Kong, Jun Jin, Sohn, Kyomin, Kim, Nam Sung, Lee, Jung-Bae
Published in IEEE journal of solid-state circuits (01.01.2021)
Published in IEEE journal of solid-state circuits (01.01.2021)
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Journal Article
A 16 GB 1024 GB/s HBM3 DRAM With Source-Synchronized Bus Design and On-Die Error Control Scheme for Enhanced RAS Features
Ryu, Yesin, Ahn, Sung-Gi, Lee, Jae Hoon, Park, Jaewon, Kim, Yong Ki, Kim, Hyochang, Song, Yeong Geol, Cho, Han-Won, Cho, Sunghye, Song, Seung Ho, Lee, Haesuk, Shin, Useung, Ahn, Jonghyun, Ryu, Je-Min, Lee, Sukhan, Lim, Kyoung-Hwan, Lee, Jungyu, Park, Jeong Hoan, Jeong, Jae-Seung, Joo, Sunghwan, Cho, Dajung, Kim, So Young, Lee, Minsu, Kim, Hyunho, Kim, Minhwan, Kim, Jae-San, Kim, Jinah, Kang, Hyun Gil, Lee, Myung-Kyu, Kim, Sung-Rae, Kwon, Young-Cheon, Byun, Young Yong, Lee, Kijun, Park, Sangkil, Youn, Jaeyoun, Kim, Myeong-O, Sohn, Kyomin, Hwang, Sang-Joon, Lee, Jooyoung
Published in IEEE journal of solid-state circuits (01.04.2023)
Published in IEEE journal of solid-state circuits (01.04.2023)
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Journal Article
A 16 GB 1024 GB/s HBM3 DRAM with On-Die Error Control Scheme for Enhanced RAS Features
Ryu, Yesin, Kwon, Young-Cheon, Lee, Jae Hoon, Ahn, Sung-Gi, Park, Jaewon, Lee, Kijun, Choi, Yu Ho, Cho, Han-Won, Kim, Jae San, Lee, Jungyu, Lee, Haesuk, Song, Seung Ho, Min Ryu, Je, Yun, Yeong Ho, Shin, Useung, Cho, Dajung, Park, Jeong Hoan, Jeong, Jae-Seung, Lee, Sukhan, Lim, Kyoung-Hwan, Kim, Tae-Sung, Kim, Kyungmin, Cha, Yu Jin, Joo Lee, Ik, Byun, Tae Kyu, Sik Yoo, Han, Song, Yeong Geol, Lee, Myung-Kyu, Cho, Sunghye, Kim, Sung-Rae, Choi, Ji-Min, Kim, Hyoung Min, Young Kim, Soo, Youn, Jaeyoun, Kim, Myeong-O, Sohn, Kyomin, Hwang, SangJoon, Lee, JooYoung
Published in 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (12.06.2022)
Published in 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (12.06.2022)
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Conference Proceeding
Power-Efficient Nonvolatile Ternary Content Addressable Memory with Flexible Search Scope Using Reconfigurable Match Line Segment and Selective Search Line
Kim, Cheol, Ahn, Sung-Gi, Min, Jisu, Kim, Sung-Yong, Kwon, Kee-Won
Published in Journal of nanoscience and nanotechnology (01.10.2019)
Published in Journal of nanoscience and nanotechnology (01.10.2019)
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Journal Article