Operation characteristics of Poly-Si nanowire charge-trapping flash memory devices with SiGe and Ge buried channels
Fang, Hsin-Kai, Chang-Liao, Kuei-Shu, Huang, Chien-Pang, Lee, Wei-Zhi
Published in Vacuum (01.06.2017)
Published in Vacuum (01.06.2017)
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Journal Article
SiO2 tunneling and Si3N4/HfO2 trapping layers formed with low temperature processes on gate-all-around junctionless charge-trapping flash memory devices
Fang, Hsin-Kai, Chang-Liao, Kuei-Shu, Cheng, Chia-Hsin, Lin, Po-Yao, Huang, Wen-Hsien, Shen, Chang-Hong, Shieh, Jia-Min
Published in Microelectronics and reliability (01.12.2018)
Published in Microelectronics and reliability (01.12.2018)
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Journal Article
Minimized program disturb for vertically stacked junctionless charge-trapping flash memory devices by adopting in-situ doped poly-silicon channel
Fang, Hsin-Kai, Chang-Liao, Kuei-Shu, Chen, Chun-Yuan, Chen, Po-Hao, Li, Dong-Yan, Huang, Chien-Pang, Shen, Chang-Hong, Shieh, Jia-Min
Published in Microelectronic engineering (01.11.2015)
Published in Microelectronic engineering (01.11.2015)
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Journal Article