Reliable Assessment of Progressive Breakdown in Ultrathin MOS Gate Oxides Toward Accurate TDDB Evaluation
Tsujikawa, S, Kanno, M, Nagashima, N
Published in IEEE transactions on electron devices (01.05.2011)
Published in IEEE transactions on electron devices (01.05.2011)
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Journal Article
Negative bias temperature instability of pMOSFETs with ultra-thin SiON gate dielectrics
Tsujikawa, S., Mine, T., Watanabe, K., Shimamoto, Y., Tsuchiya, R., Ohnishi, K., Onai, T., Yugami, J., Kimura, S.
Published in 2003 IEEE International Reliability Physics Symposium Proceedings, 2003. 41st Annual (2003)
Published in 2003 IEEE International Reliability Physics Symposium Proceedings, 2003. 41st Annual (2003)
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Conference Proceeding
SiN Gate Dielectric with Oxygen-enriched Interface (OI-SiN) Utilizing Dual-core-SiON Technique for hp65-SoC LOP Application
Tsujikawa, S., Umeda, H., Hayashi, T., Ohnishi, K., Shiga, K., Kawase, K., Yugami, J., Yoshimura, H., Yoneda, M.
Published in 2006 International Electron Devices Meeting (01.12.2006)
Published in 2006 International Electron Devices Meeting (01.12.2006)
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Conference Proceeding
A simple approach to optimizing ultra-thin SiON gate dielectrics independently for n- and p-MOSFETs
Tsujikawa, S., Umeda, H., Kawahara, T., Kawasaki, Y., Shiga, K., Yamashita, T., Hayashi, T., Yugami, J., Ohno, Y., Yoneda, M.
Published in IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest (2005)
Published in IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest (2005)
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Conference Proceeding
An ultra-thin silicon nitride gate dielectric with oxygen-enriched interface (OI-SiN) for CMOS with EOT of 0.9 nm and beyond
Tsujikawa, S., Mine, T., Shimamoto, Y., Tonomura, O., Tsuchiya, R., Ohnishi, K., Hamamura, H., Torii, K., Onai, T., Yugami, J.
Published in 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303) (2002)
Published in 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303) (2002)
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Conference Proceeding
Femto-second CMOS technology with high-k offset spacer and SiN gate dielectric with oxygen-enriched interface
Tsuchiya, R., Ohnishi, K., Horiuchi, M., Tsujikawa, S., Shimamoto, Y., Inada, N., Yugami, J., Ootsuka, F., Onai, T.
Published in 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303) (2002)
Published in 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303) (2002)
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Conference Proceeding