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AxOTreeS: A Tree Search Approach to Synthesizing FPGA-based Approximate Operators
Sahoo, Siva Satyendra, Ullah, Salim, Kumar, Akash
Published in ACM transactions on embedded computing systems (09.09.2023)
Published in ACM transactions on embedded computing systems (09.09.2023)
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PosAx-O: Exploring Operator-level Approximations for Posit Arithmetic in Embedded AI/ML
Immaneni, Amritha, Ullah, Salim, Nambi, Suresh, Sahoo, Siva Satyendra, Kumar, Akash
Published in Proceedings (Euromicro Conference on Digital Systems Design) (01.08.2022)
Published in Proceedings (Euromicro Conference on Digital Systems Design) (01.08.2022)
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VLSI Architectures of Approximate Arithmetic Units Applied to Parallel Sensors Calibration
da Rosa, Morgana Macedo Azevedo, da Costa, Patricia Ucker Leleu, da Costa, Eduardo Antonio Cesar, Soares, Rafael I., Bampi, Sergio
Published in IEEE transactions on circuits and systems. I, Regular papers (01.03.2024)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.03.2024)
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SyFAxO-GeN: Synthesizing FPGA-Based Approximate Operators with Generative Networks
Ranjan, Rohit, Ullah, Salim, Sahoo, Siva Satyendra, Kumar, Akash
Published in 2023 28th Asia and South Pacific Design Automation Conference (ASP-DAC) (16.01.2023)
Published in 2023 28th Asia and South Pacific Design Automation Conference (ASP-DAC) (16.01.2023)
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Design of a low power and robust VLSI power line interference canceler with optimized arithmetic operators
da Rosa, Morgana Macedo Azevedo, da Costa, Patrícia Ücker, da Costa, Eduardo Antonio César, Almeida, Sérgio J. M., Paim, Guilherme, Bampi, Sergio
Published in Analog integrated circuits and signal processing (01.08.2022)
Published in Analog integrated circuits and signal processing (01.08.2022)
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On Multiple Bit-Width IRC Receiver Optimization by Genetic Approach
Lyashev, Vladimir, Potekhin, Robert
Published in 2024 26th International Conference on Digital Signal Processing and its Applications (DSPA) (27.03.2024)
Published in 2024 26th International Conference on Digital Signal Processing and its Applications (DSPA) (27.03.2024)
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Tradeoff of FPGA Design of a Floating-point Library for Arithmetic Operators
Mu`ñoz, Daniel M., Sanchez, Diego F., Llanos, Carlos H., Ayala-Rincón, Mauricio
Published in Journal of Integrated Circuits and Systems (21.11.2010)
Published in Journal of Integrated Circuits and Systems (21.11.2010)
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Design of Fused Add-Multiply Operator using Modified Booth Recoder for Fast Arithmetic Circuits
Raghavendra, Jonnalagadda, Vigneswaran, T.
Published in Indian journal of science and technology (14.08.2015)
Published in Indian journal of science and technology (14.08.2015)
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An efficient framework for design and assessment of arithmetic operators with Reduced-Precision Redundancy
Wali, Imran, Casseau, Emmanuel, Tisserand, Arnaud
Published in 2017 Conference on Design and Architectures for Signal and Image Processing (DASIP) (01.09.2017)
Published in 2017 Conference on Design and Architectures for Signal and Image Processing (DASIP) (01.09.2017)
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Pipeline Optimization using a Cost Extension of Timed Petri Nets
Parrot, Remi, Briday, Mikael, Roux, Olivier H.
Published in Proceedings - Symposium on Computer Arithmetic (01.06.2021)
Published in Proceedings - Symposium on Computer Arithmetic (01.06.2021)
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Automated High-Level Generation of Low-Power Approximate Computing Circuits
Nepal, Kumud, Hashemi, Soheil, Tann, Hokchhay, Bahar, R. Iris, Reda, Sherief
Published in IEEE transactions on emerging topics in computing (01.01.2019)
Published in IEEE transactions on emerging topics in computing (01.01.2019)
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Generating story problems via controlled parameters in a web-based intelligent tutoring system
Khodeir, Nabila Ahmed, Elazhary, Hanan, Wanas, Nayer
Published in Campus-wide information systems (21.05.2018)
Published in Campus-wide information systems (21.05.2018)
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The use of arithmetic operators in a self-restored current mode CMOS multiple-valued logic design architecture
Teng, H.Y., Bolton, R.J.
Published in Proceedings / International Symposium on Multiple-Valued Logic (2001)
Published in Proceedings / International Symposium on Multiple-Valued Logic (2001)
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Lorentz chaotic trigonometric function pedigree based arithmetic optimization algorithm
Xu-Dong, Li, Jie-Sheng, Wang, Wen-Kuo, Hao, Hao-Ming, Song, Xiao-Rui, Zhao
Published in Journal of intelligent & fuzzy systems (01.01.2023)
Published in Journal of intelligent & fuzzy systems (01.01.2023)
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Novel ternary adders and subtractors in quantum cellular automata
Ghadamgahi, Seyed Mahdi, Sabbaghi-Nadooshan, Reza, Navi, Keivan
Published in The Journal of supercomputing (01.11.2022)
Published in The Journal of supercomputing (01.11.2022)
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